Showing results 1 to 4 of 4
A 1.8-GHz self-calibrated phase-locked loop with precise I/Q matching Park, CH; Kim, O; Kim, Beom-Sup, IEEE JOURNAL OF SOLID-STATE CIRCUITS, v.36, no.5, pp.777 - 783, 2001-05 |
A Low-Noise, 900-MHz VCO in 0.6-m CMOS chan-hong park; Kim, Beom-Sup, IEEE JOURNAL OF SOLID-STATE CIRCUITS, v.34, no.5, pp.586 - 591, 1999-05 |
A novel high-speed ring oscillator for multiphase clock generation using negative skewed delay scheme Lee, Seog-Jun; Kim, Beom-Sup; Lee, Kwyro, IEEE JOURNAL OF SOLID-STATE CIRCUITS, v.32, no.2, pp.289 - 291, 1997-02 |
Analysis and design of multistage low-phase-noise CMOS LC-ring oscillators Lim, J; Kim, J; Kim, B, IEICE TRANSACTIONS ON FUNDAMENTALS OF ELECTRONICS COMMUNICATIONS AND COMPUTER SCIENCES, v.E88A, no.4, pp.1084 - 1089, 2005 |
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