Test Generation Methods for Utilization Improvement of Hardware-Accelerated Simulation Platforms
Hardware-accelerated simulation platforms can significantly reduce the validation time. This article presents an off-platform test generation method and it compares and contrasts it against the on-platform alternative for two state-of-the-art multicore processor designs.
- Issue Date
- 2017-02
- Language
- English
- Article Type
- Editorial Material
- Citation
IEEE DESIGN & TEST, v.34, no.1, pp.65 - 76
- ISSN
- 2168-2356
- Appears in Collection
- RIMS Journal Papers
- Files in This Item
- There are no files associated with this item.
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