DC Field | Value | Language |
---|---|---|
dc.contributor.author | Hur, Jae | ko |
dc.contributor.author | Moon, Dong-Il | ko |
dc.contributor.author | Han, Jin-Woo | ko |
dc.contributor.author | Kim, Gun-Hee | ko |
dc.contributor.author | Jeon, Chang-Hoon | ko |
dc.contributor.author | Choi, Yang-Kyu | ko |
dc.date.accessioned | 2017-03-30T09:17:28Z | - |
dc.date.available | 2017-03-30T09:17:28Z | - |
dc.date.created | 2017-03-29 | - |
dc.date.created | 2017-03-29 | - |
dc.date.created | 2017-03-29 | - |
dc.date.issued | 2017-03 | - |
dc.identifier.citation | IEEE TRANSACTIONS ON NANOTECHNOLOGY, v.16, no.2, pp.315 - 320 | - |
dc.identifier.issn | 1536-125X | - |
dc.identifier.uri | http://hdl.handle.net/10203/222694 | - |
dc.description.abstract | The recently proposed device concept, the so-called charge-plasma (C-P) dopingless transistor (DLT), is revisited. The novel device, which utilizes the workfunction difference between the source/drain (S/D) metal and the substrate enclosing the S/D junction, does not demand external S/D chemical doping via ion implant. It shows excellent immunity against short-channel effects due to an extremely thin junction depth arisen from internal S/D electrical doping, which is the counter-part of the aforementioned chemical doping. For a deeper understanding of C-P devices, the tunneling effects must be considered because of the unavoidable presence of a Schottky barrier at the S/D contact interface. These tunneling effects were found to have a huge impact on current under an ON-and OFF-state. And they strongly depend on the spacer and contact length of the device. The device performance and the feasibility of the C-P DLT are also discussed, specifically, in terms of the Fermi level pinning. | - |
dc.language | English | - |
dc.publisher | IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC | - |
dc.subject | JUNCTIONLESS TRANSISTOR | - |
dc.subject | SCHOTTKY | - |
dc.subject | SOURCE/DRAIN | - |
dc.subject | PERFORMANCE | - |
dc.subject | MOSFETS | - |
dc.subject | CHANNEL | - |
dc.title | Tunneling Effects in a Charge-Plasma Dopingless Transistor | - |
dc.type | Article | - |
dc.identifier.wosid | 000396396300021 | - |
dc.identifier.scopusid | 2-s2.0-85015664269 | - |
dc.type.rims | ART | - |
dc.citation.volume | 16 | - |
dc.citation.issue | 2 | - |
dc.citation.beginningpage | 315 | - |
dc.citation.endingpage | 320 | - |
dc.citation.publicationname | IEEE TRANSACTIONS ON NANOTECHNOLOGY | - |
dc.identifier.doi | 10.1109/TNANO.2017.2663659 | - |
dc.contributor.localauthor | Choi, Yang-Kyu | - |
dc.contributor.nonIdAuthor | Moon, Dong-Il | - |
dc.contributor.nonIdAuthor | Han, Jin-Woo | - |
dc.contributor.nonIdAuthor | Kim, Gun-Hee | - |
dc.description.isOpenAccess | N | - |
dc.type.journalArticle | Article | - |
dc.subject.keywordAuthor | Band-to-band tunneling (BBT) | - |
dc.subject.keywordAuthor | charge-plasma (C-P) | - |
dc.subject.keywordAuthor | dopingless transistor (DLT) | - |
dc.subject.keywordAuthor | fermi level pinning (FLP) | - |
dc.subject.keywordAuthor | gate-induced drain leakage (GIDL) | - |
dc.subject.keywordAuthor | junctionless transistor (JLT) | - |
dc.subject.keywordAuthor | metal-induced gap states (MIGS) | - |
dc.subject.keywordAuthor | universal schottky tunneling (UST) | - |
dc.subject.keywordPlus | JUNCTIONLESS TRANSISTOR | - |
dc.subject.keywordPlus | SCHOTTKY | - |
dc.subject.keywordPlus | SOURCE/DRAIN | - |
dc.subject.keywordPlus | PERFORMANCE | - |
dc.subject.keywordPlus | MOSFETS | - |
dc.subject.keywordPlus | CHANNEL | - |
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