(A) memory-efficient hand segmentation architecture for hand gesture recognition in mobile devices

Abstract

A memory-efficient hand segmentation architecture is proposed to achieve natural hand gesture recognition. Hand segmentation occupies over 66% of hand gesture recognition flow. For natural hand ges-ture recognition, hardware accelerating hand segmentation stage is necessary. In hand segmentation, memory access time and large required memory is bottleneck of high speed hand segmentation. In previous works, they improve this problem by caching technique. However, in mobile platform, it requires external memory and external memory occupies large form factor and consumes large power. In this work, I proposed novel high speed memory-efficient designs which are hand contour tracing unit and fast contour filling unit instead of increasing memory size. In hand contour tracing unit, streaming architecture is used and this reduce inter-mediate data memory size and memory access of intermediate data read and write operation. Moreover, new memory-efficient contour filling algorithm is applied in fast contour filling unit and it reduce number of memory access in contour filling operation. As a result, the hand segmentation architecture is implemented in a 65nm CMOS technology achieves 134.5fps (7.43ms latency) on a CIF image and consumes 2.469mW for natural hand gesture recognition. It achieves 26.5% latency reduction, 40.2% required memory reduction compared to the previous state-of-the-arts hand segmentation architecture.