Neuromorphic circuit design using stochastic computation

Abstract

Neuromorphic circuits include complex blocks and SRAM to implement functions, which can be reduced to several gates by using stochastic computation (SC). SC is based on stochastic computation and represents a real number as a bit stream that consists of randomly shuffled 0s and 1s. To make bit streams, a lot of stochastic number generators (SNG) are utilized, which increases area and threatens benefit of SC. However, configuration of SNG should be changed carefully because it affects accuracy of SC. In this paper, LFSR sharing technique that based on random wiring within a subset of LFSR, is proposed. Proposed method reduces area and secures prediction accuracy, at the same time. From the experiment using 28nm library, circular shift and proposed method both reduce area by 86%, while degrade prediction accuracy 52% and 11%, respectively.