Evaluation of equipment models of clustered photolithography tools for semiconductor fab simulation

Abstract

In semiconductor manufacturing, fab-level simulation is an important decision support technology for the analysis and optimization of semiconductor wafer fabricators. In such facilities, a clustered photolithography tool (CPT) is by far the most expensive tool and often the capacity bottleneck. As key components of fab-level simulation, equipment models of CPTs are studied in this thesis. We consider linear, affine, exit recursion, and flow line, and detailed models of CPTs for use in fab-level simulation. We improve upon and develop extensions to exit recursion and flow line models and demonstrate exactly how to convert raw CPT data into the various models with detailed parameterization and simulation equations. Using a detailed CPT model based on industry data as the baseline, numerical experiments are conducted to test the model’s fidelity for cycle time, lot residency time, and throughput time. We also compare the computational complexity of each model class. Other simulations are conducted to test the model’s predictive performance under current operating conditions and to assess the models’ robustness to changing fab conditions, e.g., when lot sizes or the train sizes change. Linear and affine models are shown to be the fastest in computation but are the least accurate and robust. Exit recursion models have accuracy and robustness that fall in between affine and flow line models. Flow line models are shown to be the most accurate and robust of all the investigated models and require approximately 200 times less computation than detailed models. Inspired by the performance of flow line models, we conduct additional studies to determine whether flow line models can express fundamental CPT system behaviors and effectively replace detailed models for use in throughput optimization.