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College of Engineering(공과대학)School of Electrical Engineering(전기및전자공학부)EE-Journal Papers(저널논문)

Architecture and algorithm for ultra-high precision image rejection mixer using digital compensation

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dc.contributor.authorKim, YJko
dc.contributor.authorPark, HCko
dc.contributor.authorNam, IKko
dc.contributor.authorLee, Kwyroko
dc.date.accessioned2010-12-28T01:51:59Z-
dc.date.available2010-12-28T01:51:59Z-
dc.date.created2012-02-06-
dc.date.created2012-02-06-
dc.date.issued2000-09-
dc.identifier.citationELECTRONICS LETTERS, v.36, no.19, pp.1604 - 1606-
dc.identifier.issn0013-5194-
dc.identifier.urihttp://hdl.handle.net/10203/21264-
dc.description.abstractA Weaver-type ultra-high precision image rejection RF mixer architecture composed of analogue RF and digital IF mixers is proposed, along with the error compensating algorithm for various gain and phase mismatches. A prototype 2.4GHz image rejection mixer using this technique with an image rejection ratio > 70dB is demonstrated.-
dc.description.sponsorshipThis work was supported by the MICROS (Micro Information and Communication Remote Object-Oriented System) Research Centre.en
dc.languageEnglish-
dc.language.isoen_USen
dc.publisherIEE-INST ELEC ENG-
dc.titleArchitecture and algorithm for ultra-high precision image rejection mixer using digital compensation-
dc.typeArticle-
dc.identifier.wosid000089721900005-
dc.identifier.scopusid2-s2.0-0034648540-
dc.type.rimsART-
dc.citation.volume36-
dc.citation.issue19-
dc.citation.beginningpage1604-
dc.citation.endingpage1606-
dc.citation.publicationnameELECTRONICS LETTERS-
dc.identifier.doi10.1049/el:20001151-
dc.embargo.liftdate9999-12-31-
dc.embargo.terms9999-12-31-
dc.contributor.localauthorLee, Kwyro-
dc.contributor.nonIdAuthorKim, YJ-
dc.contributor.nonIdAuthorPark, HC-
dc.contributor.nonIdAuthorNam, IK-
dc.type.journalArticleArticle-
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