Three-transistor one-time programmable (OTP) ROM cell array using standard CMOS gate oxide antifuse

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dc.contributor.authorKim, Jko
dc.contributor.authorLee, Kwyroko
dc.date.accessioned2010-12-14T02:59:19Z-
dc.date.available2010-12-14T02:59:19Z-
dc.date.created2012-02-06-
dc.date.created2012-02-06-
dc.date.issued2003-09-
dc.identifier.citationIEEE ELECTRON DEVICE LETTERS, v.24, pp.589 - 591-
dc.identifier.issn0741-3106-
dc.identifier.urihttp://hdl.handle.net/10203/21008-
dc.description.abstractA three-transistor (3-T) cell CMOS one-time programmable (OTP) ROM array using CMOS antifuse (AF) based on permanent breakdown of MOSFET gate oxide is proposed, fabricated and characterized. The proposed 3-T OTP cell for ROM array is composed of an nMOS AF, a high-voltage blocking nMOS, and cell access transistor, all compatible with standard CMOS technology. The experimental results show that the proposed structure can be a viable technology option of high-density CMOS OTP ROM array for modern digital as well as analog circuits.-
dc.description.sponsorshipThe authors appreciate useful discussion with Dr. K. Kim at Samsung Electronics Co. Ltd. and careful reviewers’ comment.en
dc.languageEnglish-
dc.language.isoen_USen
dc.publisherIEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC-
dc.titleThree-transistor one-time programmable (OTP) ROM cell array using standard CMOS gate oxide antifuse-
dc.typeArticle-
dc.identifier.wosid000184924700021-
dc.identifier.scopusid2-s2.0-0141563593-
dc.type.rimsART-
dc.citation.volume24-
dc.citation.beginningpage589-
dc.citation.endingpage591-
dc.citation.publicationnameIEEE ELECTRON DEVICE LETTERS-
dc.identifier.doi10.1109/LED.2003.815429-
dc.embargo.liftdate9999-12-31-
dc.embargo.terms9999-12-31-
dc.contributor.localauthorLee, Kwyro-
dc.contributor.nonIdAuthorKim, J-
dc.type.journalArticleArticle-
dc.subject.keywordAuthorCMOS antifuse-
dc.subject.keywordAuthorCMOS OTP-
dc.subject.keywordAuthorgate-oxide breakdown-
dc.subject.keywordAuthorOTP ROM-
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