DC Field | Value | Language |
---|---|---|
dc.contributor.author | Kwon, CK | ko |
dc.contributor.author | Lee, Kwyro | ko |
dc.date.accessioned | 2010-12-14T02:53:18Z | - |
dc.date.available | 2010-12-14T02:53:18Z | - |
dc.date.created | 2012-02-06 | - |
dc.date.created | 2012-02-06 | - |
dc.date.issued | 2001-10 | - |
dc.identifier.citation | IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS, v.9, no.5, pp.726 - 729 | - |
dc.identifier.issn | 1063-8210 | - |
dc.identifier.uri | http://hdl.handle.net/10203/21007 | - |
dc.description.abstract | A minimum distance search engine (MDSE) is presented as a hardware. accelerator for various exhaustive pattern-matching systems. This chip executes highly parallel computations of L-1-norms between an input query and stored multiple reference records, and searches for the minimum distance among them in a highly parallel fashion. Our architectural-level estimation shows that this MDSE can reduce energy dissipation by orders of magnitude as the number of records increases, compared with the conventional systems. We have designed a prototype 4-bit 8-word MDSE composed of merged memory logic (MML) and digital/analog-mixed winner-take-all circuit (DAM-WTAC) by using hybrid digital/analog circuit techniques. It was fabricated with a 0.6-mum single-poly triple-metal CMOS technology. Experimental results show that our chip works properly at 3 V/10 MM and has approximately four times larger throughput as well as four times higher energy efficiency, compared with the existing 8-bit microcontrollers. | - |
dc.description.sponsorship | The author would like to thank MICROS, IDEC and Samsung Electronics Company for their support. They would also like to thank the reviewers for their valuable comments and Dr. K. Kim, Samsung Electronics Company, for useful discussion. | en |
dc.language | English | - |
dc.language.iso | en_US | en |
dc.publisher | IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC | - |
dc.title | Highly parallel and energy-efficient exhaustive minimum distance search engine using hybrid digital/analog circuit techniques | - |
dc.type | Article | - |
dc.identifier.wosid | 000171385700015 | - |
dc.identifier.scopusid | 2-s2.0-0035472851 | - |
dc.type.rims | ART | - |
dc.citation.volume | 9 | - |
dc.citation.issue | 5 | - |
dc.citation.beginningpage | 726 | - |
dc.citation.endingpage | 729 | - |
dc.citation.publicationname | IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS | - |
dc.embargo.liftdate | 9999-12-31 | - |
dc.embargo.terms | 9999-12-31 | - |
dc.contributor.localauthor | Lee, Kwyro | - |
dc.contributor.nonIdAuthor | Kwon, CK | - |
dc.type.journalArticle | Article | - |
dc.subject.keywordAuthor | digital/analog-mixed circuit | - |
dc.subject.keywordAuthor | low-power design | - |
dc.subject.keywordAuthor | memory | - |
dc.subject.keywordAuthor | static CMOS combinational circuit | - |
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