DC Field | Value | Language |
---|---|---|
dc.contributor.author | Chung, Sang-Hye | ko |
dc.contributor.author | Kim, Young Ju | ko |
dc.contributor.author | Kim, Yonghun | ko |
dc.contributor.author | Kim, Lee-Sup | ko |
dc.date.accessioned | 2016-07-04T01:58:49Z | - |
dc.date.available | 2016-07-04T01:58:49Z | - |
dc.date.created | 2015-09-30 | - |
dc.date.created | 2015-09-30 | - |
dc.date.issued | 2016-03 | - |
dc.identifier.citation | IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-EXPRESS BRIEFS, v.63, no.3, pp.264 - 268 | - |
dc.identifier.issn | 1549-7747 | - |
dc.identifier.uri | http://hdl.handle.net/10203/208788 | - |
dc.description.abstract | This brief presents a power-efficient forwarded-clock receiver that is tolerant to high-frequency jitter by mixing filtered clock jitter to data. Due to mixing the filtered clock jitter, the proposed receiver does not include power-hungry delay lines but a phase interpolator, which enables saving significant power consumption. In a prototype receiver implemented in a 1-V 65-nm complementary metal-oxide-semiconductor process, it removes 2-GHz 0.7UI jitter modulated in data by an amount of 22%. It achieves 10 Gb/s with 0.71 pJ/bit in 10-cm FR4 channels and occupies 0.012 mm(2). | - |
dc.language | English | - |
dc.publisher | IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC | - |
dc.subject | 65 NM CMOS | - |
dc.title | A 10-Gb/s 0.71-pJ/bit Forwarded-Clock Receiver Tolerant to High-Frequency Jitter in 65-nm CMOS | - |
dc.type | Article | - |
dc.identifier.wosid | 000373136200008 | - |
dc.identifier.scopusid | 2-s2.0-84963988890 | - |
dc.type.rims | ART | - |
dc.citation.volume | 63 | - |
dc.citation.issue | 3 | - |
dc.citation.beginningpage | 264 | - |
dc.citation.endingpage | 268 | - |
dc.citation.publicationname | IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-EXPRESS BRIEFS | - |
dc.identifier.doi | 10.1109/TCSII.2015.2482400 | - |
dc.contributor.localauthor | Kim, Lee-Sup | - |
dc.contributor.nonIdAuthor | Chung, Sang-Hye | - |
dc.description.isOpenAccess | N | - |
dc.type.journalArticle | Article | - |
dc.subject.keywordAuthor | Clock deskew | - |
dc.subject.keywordAuthor | clock recovery | - |
dc.subject.keywordAuthor | injection-locked oscillator (ILO) | - |
dc.subject.keywordAuthor | jitter filter | - |
dc.subject.keywordAuthor | jitter mixer | - |
dc.subject.keywordAuthor | source-synchronous parallel link | - |
dc.subject.keywordPlus | 65 NM CMOS | - |
Items in DSpace are protected by copyright, with all rights reserved, unless otherwise indicated.