DC Field | Value | Language |
---|---|---|
dc.contributor.author | Cho, DH | ko |
dc.contributor.author | Ryum, BR | ko |
dc.contributor.author | Han, TH | ko |
dc.contributor.author | Lee, SM | ko |
dc.contributor.author | Shin, Sung-Chul | ko |
dc.contributor.author | Lee, C | ko |
dc.date.accessioned | 2010-12-03T02:20:34Z | - |
dc.date.available | 2010-12-03T02:20:34Z | - |
dc.date.created | 2012-02-06 | - |
dc.date.created | 2012-02-06 | - |
dc.date.issued | 1998-09 | - |
dc.identifier.citation | SOLID-STATE ELECTRONICS, v.42, no.9, pp.1641 - 1649 | - |
dc.identifier.issn | 0038-1101 | - |
dc.identifier.uri | http://hdl.handle.net/10203/20682 | - |
dc.description.abstract | A SiGe HBT having a f(max) higher than f(T) has been fabricated using a production CVD reactor which allows SiH2Cl2-based Si collector epi-growth at high rate as well as SiH4-based SiGe base epi-growth at low rate. Transistor design together with process integration was focused on lowering the extrinsic base resistance and the collector-base capacitance. To this purpose, a TiSi2 layer with a sheet resistance of 1.3 Omega/sq was used as a base electrode and a selectively implanted collector was utilized. For the base layer, an undoped-Si (300 Angstrom)/p-SiGe (200 Angstrom, N-A = 4.4 x 10(18) cm(-3), linearly-graded Ge composition from 0 to 0.19)/undoped-Si0.81Ge0.19 (110 Angstrom)/undoped-Si (500 Angstrom) multilayer was deposited on a LOCOS-patterned wafer. In order to form the emitter-base junction and to activate the arsenic dopants in the polysilicon-emitter, rapid thermal annealing (RTA) at 900 degrees C for 20 s was performed only one time so that outdiffusion of the boron in the base could be suppressed. The collector and base currents are shown nearly ideal. We obtained a f(T) of 37 GHz which is near the theoretical limit imposed by BVCEO and a f(max) of 42 GHz. The base resistance and the collector-base capacitance extracted from measured S-parameters have a value of 37 Omega and 27.2 fF, respectively. (C) 1998 Elsevier Science Ltd. All rights reserved. | - |
dc.language | English | - |
dc.language.iso | en_US | en |
dc.publisher | PERGAMON-ELSEVIER SCIENCE LTD | - |
dc.subject | POLYSILICON-EMITTER | - |
dc.subject | BIPOLAR-TRANSISTORS | - |
dc.subject | TISI2 | - |
dc.title | A 42-GHz (f(max)) SiGe-base HBT using reduced pressure CVD | - |
dc.type | Article | - |
dc.identifier.wosid | 000076156200002 | - |
dc.identifier.scopusid | 2-s2.0-0032167224 | - |
dc.type.rims | ART | - |
dc.citation.volume | 42 | - |
dc.citation.issue | 9 | - |
dc.citation.beginningpage | 1641 | - |
dc.citation.endingpage | 1649 | - |
dc.citation.publicationname | SOLID-STATE ELECTRONICS | - |
dc.identifier.doi | 10.1016/S0038-1101(98)00110-5 | - |
dc.embargo.liftdate | 9999-12-31 | - |
dc.embargo.terms | 9999-12-31 | - |
dc.contributor.localauthor | Shin, Sung-Chul | - |
dc.contributor.nonIdAuthor | Cho, DH | - |
dc.contributor.nonIdAuthor | Ryum, BR | - |
dc.contributor.nonIdAuthor | Han, TH | - |
dc.contributor.nonIdAuthor | Lee, SM | - |
dc.type.journalArticle | Article | - |
dc.subject.keywordPlus | POLYSILICON-EMITTER | - |
dc.subject.keywordPlus | BIPOLAR-TRANSISTORS | - |
dc.subject.keywordPlus | TISI2 | - |
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