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| NO | Title, Author(s) (Publication Title, Volume Issue, Page, Issue Date) |
|---|---|
| MIGHTI : A High Performance 16-bit DSP for Mobile Communication Applications Beom-Sup Kim, European Solid-State Circuits Conference (ESSCIRC '98), 1998 | |
| Low Noise Clock Synthesizer Design Using Optimal Bandwidth Beom-Sup Kim, IEEE International Symposium on Circuits and Systems, 1998 | |
| A 640 MB/s Bi-Directional Data Strobed, Double-Data-Rate SDRAM with a 40mW DLL Circuit for a 256MB Memory System Beom-Sup Kim, IEEE International Solid State Circuits Conference, 1998 | |
| Dual-Loop Digital PLL Design for Adaptive Clock Recovery Beom-Sup Kim, ASP-DAC'98, pp.347 - 352, ASP-DAC, 1998-02 | |
| Symbol Timing Recovery Using Digital Spectral Line Method for 16-CAP VDSL System Beom-Sup Kim, IEEE GLOBECOM, IEEE, 1998-11 |
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