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| NO | Title, Author(s) (Publication Title, Volume Issue, Page, Issue Date) |
|---|---|
| Design of a 3.0 V CMOS continuous time low-pass filter with on-chip tuning circuits for CDMA cellular phone application Park Chan-Hong; Kim Beomsup, Proceedings of the 1997 40th Midwest Symposium on Circuits and Systems. Part 1 (of 2), pp.1374 - 1377, Midwest Symposium on Circuits and Systems, 1997-08-03 | |
| Parameter optimization of a voltage reference circuit using EP Nam Dongkyung; Seo Yun Deuk; Park Lae-Jeong; Park, Cheol Hoon; Kim Bumsup, Proceedings of the 1998 IEEE International Conference on Evolutionary Computation, ICEC'98, pp.301 - 305, IEEE, 1998-05-04 | |
| Synthesis of application specific instructions for embedded DSP software Choi, H; Park, In-Cheol; Hwang, SH; Kyung, Chong-Min, Proceedings of the 1998 IEEE/ACM International Conference on Computer-Aided Design, ICCAD, pp.665 - 671, IEEE, 1998-11-08 | |
| Evaluation of Porous Ceramic as Microbial Carrier of Biofilter to Remove Toluene Vapor Park, Heekyung; Koo, Ja-Kong; Lim, Jae-Shin; Park, Sang-Jin, International Conference on Water, Environment, Ecology, Socioeconomics and Health Engineering(WEESHE), WEESHE, 1999-10 | |
| Practical use of transition mode delay to solve the problems of floating mode delay under highly correlated input streams Choi Hoon; Hwang Seung Ho, Proceedings of the 1998 IEEE International Conference on Computer Design, pp.536 - 541, IEEE, 1998-10-05 | |
| MDSP-II: 16-bit DSP with mobile communication accelerator Kim, B.W.; Yang, J.H.; Kwon, Y.S.; Lee, K.M.; Kim, I.H.; Hwang, C.S.; Lee, D.H.; Lee, J.Y.; Kim, J.S.; Yoon, H.D.; Kim, J.S.; Park, K.I.; Park, K.H.; Lee, Yong-Hoon; Hwang, S.H.; Kyung, Chong-Min, Proceedings of the 1998 IEEE Custom Integrated Circuits Conference, pp.5 - 8, IEEE, 1998-05-11 | |
| Architecture selection of a flexible DSP core using reconfigurable system software Lee, Jong-Yeol; Lee, Dea-Hyun; Kim, Jong-Sun; Yoon, Hyun-Dhong; Kyung, Chong-Min; Park, Kyu Ho; Lee, Yong-Hoon; Hwang, Seung-Ho, Proceedings of the 1998 IEEE International Symposium on Circuits and Systems, ISCAS. Part 5 (of 6), pp.37 - 40, IEEE, 1998-05-31 | |
| Generalization of exponentially weighted RLS algorithm based on a state-space model Chun, Byungjin; Kim, Beomsup; Lee, Yong-Hoon, Proceedings of the 1998 IEEE International Symposium on Circuits and Systems, ISCAS. Part 5 (of 6), pp.198 - 201, IEEE, 1998-05-31 | |
| Dual-Loop Digital PLL Design for Adaptive Clock Recovery Beom-Sup Kim, ASP-DAC'98, pp.347 - 352, ASP-DAC, 1998-02 | |
| Improving two-level logic minimization technique for low power driven multilevel logic re-synthesis Choi Hoon; Hwang Seung Ho, Proceedings of the 1997 40th Midwest Symposium on Circuits and Systems. Part 1 (of 2), pp.1026 - 1029, Midwest Symposium on Circuits and Systems, 1997-08-03 |