Browse "RIMS Conference Papers" by Author 879
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| A State Encoding Scheme Based on a Novel Cost Estimation Method 황승호, 젊은 공학도를 위한 반도체 Workshop, 1993 |
| Abstract Simulator : A Sotfware Timing analysis Tool Seung-Ho Hwang, International Conference on Signal Processing Applications and Technology, pp.890 - 894, 1996 |
| Advanced contrast enhancement using partially overlapped sub-block histogram equalization Kim, JY; Kim, Lee-Sup; Hwang, SH, Proceedings of the IEEE 2000 Internaitonal Symposium on Circuits and Systems, v.4, 2000-05-28 |
| An Accurate Delay Modeling Technique for Switch - level Timing Verification Seung-Ho Hwang, ACM/IEEE Design Automation Conference, pp.227 - 233, 1986 |
| An Automated Electron-Beam Diagnostic System Seung-Ho Hwang, Japanese Electron-Beam Testing Symposium, 1990 |
| An Educational and Learning kit for VHDL Modeling and ASIC Implementation Seung-Ho Hwang, The Electronic Design Autimation & Test Conference and Exhibition, 1994 |
| An Efficient Design Correctness Checker of Finite-State Machines Seung-Ho Hwang, Proceedings of IEEE International Conference on Computer-Aided Design, pp.410 - 413, 1987 |
| An Erolution Algorithm for Microcock Bit Optimiqation Seung-Ho Hwang, The first Asia-Pacific Conference on Simulated Erolution and Learnirg, pp.217 - 223, 1996 |
| BEAVER: A Behavioral Formal Verifier of VLSI Design Seung-Ho Hwang, IFIP International Workshop on Applied Formal Methods for Correct VLSI Design, 1989 |
| Design of a DCT/IDCT Processor Seung-Ho Hwang, 대한전자공학회 '95 DSP Workshop, 1995 |
| Design of Wave-Pipelined 900MHz 16b Ripple-Carry Adder Using Modified NPCPL Seung-Ho Hwang, IEEE International Symposium on Circuits and Systems, pp.207 - 209, 1996 |
| Design of wave-pipelined 900MHz 16b ripple-carry adder using modified NPCPL Choi H.; Hwang S.H., Proceedings of the 1996 IEEE International Symposium on Circuits and Systems, ISCAS. Part 1 (of 4), v.4, pp.182 - 184, 1996-05-12 |
| Estimation of inertial-delay dependent switching activities by using time-stamped transition density Choi Hoon; Yi Ju Hwan; Hwang Seung Ho, Proceedings of the 1997 IEEE International Symposium on Circuits and Systems, ISCAS'97. Part 4 (of 4), v.3, pp.1528 - 1531, 1997-06-09 |
| Performance Improvement of Pingpong Algorithm Applying New Seed Selection Method 황승호, 한국통신학회 하계학술발표회, 1992 |
| Proportional-Integral Plus Bang-Bang Control of DC Servo Motors with PWM Drives Bien, Zeung nam; Seung-Ho Hwang, World Congress International Federation of Automatic Control, pp.282 - 286, 1984 |
| Reducing the size of a BDD in the combinational circuit power estimation by using the dynamic size limit Choi Hoon; Hwang Seung Ho, Proceedings of the 1997 IEEE International Symposium on Circuits and Systems, ISCAS'97. Part 4 (of 4), v.3, pp.1520 - 1523, 1997-06-09 |
| Stochastic evolution algorithm for the graph covering problem and its application to the technology mapping Lee Dae-Hyun; Choi Hoon; Park Lae-Jeong; Park, Cheol Hoon; Hwang Seung Ho, Proceedings of the 1996 IEEE International Conference on Evolutionary Computation, ICEC'96, pp.475 - 479, 1996-05-20 |
| Tackling EMI in Flat-Panel Displays Seung-Ho Hwang, International Microelectronics and Packaging Society, Advanced Technology Workshop: Flat Panel Displays, 1996 |
| Techniques for Special Instruction Generation for DSP ASIP Seung-Ho Hwang, 5th Asia Pacific Conference on Hardware Description Languages(APCHDL'98), 1998 |
| Technology Mapping for Storage Elements Based on BDD Matching Seung-Ho Hwang, IEEE International Workshop on Logic Synthesis, 1997 |
| 제어변수와 상태변수의 제약조건이 있는 시간지연 시스템의 제어 변증남; 황승호, 대한전자공학회 추계종합학술대회, pp.1 - 6, 1980 |
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