Showing results 1 to 14 of 14
A 16b quadrature direct digital frequency synthesizer using interpolative angle rotation algorithm Song Y.; Kim B., 2002 Symposium on VLSI Circuits Digest of Technical Papers, pp.146 - 147, IEEE, 2002-06-13 |
A 250MHz direct digital frequency synthesizer with ΣΔ noise shaping Song Y.; Kim B., 2003 Digest of Technical Papers, 2003-02-09 |
A 500Mb/s/pin quadruple data rate SDRAM interface using a Skew cancellation technique Kim J.; Wang S.-H.; Lee J.; Hyoung Sik Nam; Young Gon Kim; Jae Hoon Shim; Hyung Ki Ahn; et al, 2000 IEEE International Solid-State Circuits Conference 47th Annual ISSCC, pp.404 - 405, 2000-02-07 |
A fully integrated CMOS RF front-end with on-chip VCO for WCDMA applications Lim K.; Park C.-H.; Hyung Ki Ahn; Jae Joon Kim; Kim B., Digest of Technical Papers - IEEE International Solid-State Circuits Conference, pp.286 - 287, 2001-02-05 |
A Loss Minimization in adapter chaining for mobile ubiquitous computing environments Kim B., 2011 9th IEEE International Conference on Pervasive Computing and Communications Workshops, PERCOM Workshops 2011, pp.399 - 400, 2011-03-21 |
A low power CMOS bluetooth transceiver with a digital offset canceling DLL-based GFSK demodulator Park C.-H.; Byun S.; Song Y.; Wang S.; Conroy C.; Kim B., 2003 Digest of Technical Papers, 2003-02-09 |
A low-phase-noise CMOS LC oscillator with a ring structure Jae Joon Kim; Kim B., 2000 IEEE International Solid-State Circuits Conference 47th Annual ISSCC, pp.430 - 431, 2000-02-07 |
A network-adaptive SVC streaming architecture Chen P.; Lim J.; Lee B.; Kim M.; Hahm S.; Kim B.; Lee K.; et al, 9th International Conference on Advanced Communication Technology, ICACT 2007, v.2, pp.955 - 960, 2007-02-12 |
A quad-channel 3.125Gb/s/ch serial-link transceiver with mixed-mode adaptive equalizer in 0.18um CMOS Yang J.; Kim J.; Byun S.; Conroy C.; Kim B., Digest of Technical Papers - IEEE International Solid-State Circuits Conference: Visuals Supplement, v.47, pp.134 -, 2003-02-15 |
A quad-channel 3.125Gb/s/ch serial-link transceiver with mixed-mode adaptive equalizer in 0.18um CMOS Yang J.; Kim J.; Byun S.; Conroy C.; Kim B., Digest of Technical Papers - 2004 IEEE International Solid-State Circuits Conference, v.47, pp.176 -, 2003-02-15 |
A third-order ΣΔ modulator in 0.18μm CMOS with calibrated mixed-mode integrators Shim J.H.; Kim B., 2004 Symposium on VLSI Circuits, Digest of Technical Papers, 2004 VLSI, pp.78 - 81, 2004-06-17 |
An area-efficient implementation of digital-IF QAM coherent demodulator for software-defined radio receivers Song Y.; Kim J.; Kim B., 2004 Symposium on VLSI Circuits, Digest of Technical Papers, 2004 VLSI, pp.160 - 163, 2004-06-17 |
Digital timing synchronization with jitter reduction technique for CAP-based VDSL system Song Y.; Lee K.; Kim B., 2001 IEEE Interntional Conference on Acoustics, Speech, and Signal Processing, pp.2325 - 2328, IEEE, 2001-05-07 |
Tree-based Replica Location Scheme (TRLS) for data grids Nam D.S.; Jeong S.; Kim B.; Youn C.-H., 6th International Conference on Advanced Communication Technology: Broadband Convergence Network Infrastructure, v.2, pp.960 - 964, 2004-02-09 |
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