Showing results 8 to 21 of 21
Being Mondrian: The public installation for interactive drawing with tangible interface Kim T.; Ahn S.; Lee S., Conference on Designing for User eXperiences, DUX 2007, 2007-11-05 |
Bus-invert coding for low-power I/O - A decomposition approach Hong S.; Narayanan U.; Chung K.-S.; Kim T., 43rd IEEE Midwest Circuits and Systems Conference, 2000, pp.750 - 753, IEEE, 2000-08-08 |
Code Placement with Selective Cache Activity Minimization for Embedded Real-time Software Design Um J.; Kim T., IEEE/ACM International Conference on Computer Aided Design ICCAD 2003: IEEE/ACM Digest of Technical Papers, pp.197 - 200, ICCAD '03, 2003-11-09 |
Coupling-aware high-level interconnect synthesis for low power Lyuh C.-G.; Kim T.; Kim K.-W., IEEE/ACM International Conference on Computer Aided Design (ICCAD), pp.609 - 613, 2002-11-10 |
Higher-order twisted q-Euler polynomials and numbers Kim D.; Kim M.-S.; Kim T., Proceedings of the Jangjeon Mathematical Society, v.13, no.2, pp.265 - 277, Jangjeon Research Institute for Mathematical Sciences and Physics, 2010-07 |
Independent vector analysis: Definition and algorithms Kim T.; Lee I.; Lee T.-W., 40th Asilomar Conference on Signals, Systems, and Computers, ACSSC '06, pp.1393 - 1396, 2006-10-29 |
Layout-aware synthesis of arithmetic circuits Um J.; Kim T., 39th Annual Design Automation Conference, DAC'02, pp.207 - 212, DAC, 2002-06-10 |
Layout-driven resource sharing in high-level synthesis Um J.; Kim J.-H.; Kim T., IEEE/ACM International Conference on Computer Aided Design (ICCAD), pp.614 - 618, IEEE, 2002-11-10 |
Leakage power minimization for the synthesis of parallel multiplier circuits Shin K.; Kim T., Proceedings of the 2004 ACM Great lakes Symposium on VLSI, GLSVLSI 2004: VLSI in the Nanometer Era, pp.166 - 169, 2004-04-26 |
Memory access driven storage assignment for variables in embedded system design Choi Y.; Kim T., Proceedings of the ASP - DAC 2004 Asia and South Pacific Design Automation Conference - 2004, pp.478 - 481, 2004-01-27 |
Optimal integration of inter-task and intra-task dynamic voltage scaling techniques for hard real-time applications Seo J.; Kim T.; Dutt N.D., ICCAD-2005: IEEE/ACM International Conference on Computer-Aided Design, 2005, v.2005, pp.449 - 454, 2005-11-06 |
Profile-based optimal intra-task voltage scheduling for hard real-time applications Seo J.; Kim T.; Chung K.-S., Proceedings of the 41st Design Automation Conference, pp.87 - 92, 2004-06-07 |
Resource-constrained low-power bus encoding with crosstalk delay elimination Cha M.; Lyuh C.-G.; Kim T., Proceedings of the ASP - DAC 2004 Asia and South Pacific Design Automation Conference - 2004, pp.835 - 838, 2004-01-27 |
Semi-automatic road extraction from IKONOS satellite image Yoon T.; Park W.; Kim T., Remote Sensing for Environmental Monitoring, GIS Applications, and Geology, v.4545, pp.320 - 328, 2001-09-18 |
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