Showing results 1 to 4 of 4
Accurate and efficient multiple delay simulator for MOS logic circuits using polynomial approximation Jun Young-Hyun; Jun Ki; Park, Song Bai, 1988 IEEE International Symposium on Circuits and Systems, Proceedings, v.3, pp.2117 - 2120 |
ED MOS DELAY TIME MODEL BY OPTIMALLY WEIGHTED CURRENT UNBALANCES. Kim Kyong-Ho; Jun Young-Hyun; Lee Chang-Woo; Park, Song Bai, Proceedings - TENCON 87: 1987 IEEE Region 10 Conference, 'Computers and Communications Technology Toward 2000'., pp.1077 - 1080 |
Piecewise polynomial models for MOSFET dc characteristics with continuous first order derivative Jun Young-Hyun; Park, Song Bai, 1988 IEEE International Symposium on Circuits and Systems, Proceedings, v.3, pp.2589 - 2592 |
TIMING SIMULATOR BY WAVEFORM RELAXATION CONSIDERING FEEDBACK EFFECT. Jun Young-Hyun; Lee Chang-Woo; Lee Ki-Jun; Park, Song Bai, 1987 IEEE International Symposium on Circuits and Systems., pp.608 - 611 |
Discover