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An efficient edge traces technique for 3D interconnection of stack chip Kim, SR; Park, AY; Yoo, CD; Lee, JH; Song, JY; Lee, Seung Seob, 2011 61st Electronic Components and Technology Conference, ECTC 2011, pp.1878 - 1882, 2011-05-31 |
Strength design and minimization of residual stresses in reversible GaAs wafer bonding process Choi, ST; Song, JY; Kim, JH; Lee, S; Earmme, Youn-Young, KEY ENGINEERING MATERIALS, v.306-308, pp.1337 - 1342, 2006-03 |
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