Browse "School of Electrical Engineering(전기및전자공학부)" by Subject Synapses
Showing results 1 to 6 of 6
| A Junctionless Single Transistor Neuron with Vertically Stacked Multiple Nanowires for Highly Scalable Neuromorphic Hardware Han, Joon-Kyu; Yu, Ji-Man; Choi, Yang-Kyu, IEEE TRANSACTIONS ON ELECTRON DEVICES, v.69, no.6, pp.3142 - 3146, 2022-06 |
| An Overturned Charge Injection Synaptic Transistor with a Floating-gate for Neuromorphic Hardware Computing Kim, Myung-Su; Kim, Jin-Ki; Yun, Gyeong-Jun; Yu, Ji-Man; Han, Joon-Kyu; Lee, Jung-Woo; Seo, Seokho; et al, IEEE ELECTRON DEVICE LETTERS, v.43, no.9, pp.1440 - 1443, 2022-09 |
| Co-integrated Neuromorphic Devices for Bio-inspired Compliance Control Shin, Hery; Yu, Ji-Man; Han, Joon-Kyu; Choi, Yang-Kyu, IEEE TRANSACTIONS ON NANOTECHNOLOGY, v.22, pp.706 - 712, 2023-11 |
| One Biristor-Two Transistor (1B2T) Neuron With Reduced Output Voltage and Pulsewidth for Energy-Efficient Neuromorphic Hardware Han, Joon-Kyu; Yun, Gyeong-Jun; Han, Seong-Joo; Yu, Ji-Man; Choi, Yang-Kyu, IEEE TRANSACTIONS ON ELECTRON DEVICES, v.68, no.1, pp.430 - 433, 2021-01 |
| SPICE Study of STDP Characteristics in a Drift and Diffusive Memristor-Based Synapse for Neuromorphic Computing Hu, Suman; Kang, Jaehyun; Kim, Taeyoon; Lee, Suyoun; Park, Jong Keuk; Kim, Inho; Kim, Jaewook; et al, IEEE ACCESS, v.10, pp.6381 - 6392, 2022-01 |
| The Hardware and Algorithm Co-Design for Energy-Efficient DNN Processor on Edge/Mobile Devices Lee, Jinsu; Kang, Sanghoon; Lee, Jinmook; Shin, Dongjoo; Han, Donghyeon; Yoo, Hoi-Jun, IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERS, v.67, no.10, pp.3458 - 3470, 2020-10 |
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