Showing results 1 to 8 of 8
A new RTL debugging methodology in FPGA-based verification platform Yang, S.; Shim, H.; Yang, W.; Kyung, Chong-Min, Proceedings of 2004 IEEE Asia-Pacific Conference on Advanced System Integrated Circuits, pp.180 - 183, 2004-08-04 |
Automatic generation of software/hardware co-emulation interface for transaction-level communication Kim, Y.-I.; Ahn, K.-Y.; Shim, H.; Yang, W.; Kwon, Y.-S.; Ki, A.; Kyung, Chong-Min, 2005 IEEE VLSI-TSA International Symposium on VLSI Design, Automation and Test,(VLSI-TSA-DAT), v.2005, pp.196 - 199, 2005-04-27 |
Cycle-accurate verification of AHB-based RTL IP with transaction-level system environment Shim, H.; Lee, S.-H.; Woo, Y.-S.; Chung, M.-K.; Lee, J.-G.; Kyung, Chong-Min, 2006 International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2006, pp.135 - 138, 2007-04-26 |
Data Reuse Method between Heterogeneous Partitions (DRHP) in H.264/AVC motion compensator Kim, S.; Shim, H.; Kyung, Chong-Min, 2008 IEEE International Symposium on Circuits and Systems, ISCAS 2008, pp.3506 - 3509, 123, 2008-05-18 |
Fast estimation of software energy consumption using IPI(inter-prefetch interval) energy model Kim, J.; Kang, K.; Shim, H.; Hwangbo, W.; Kyung, Chong-Min, 2007 IFIP International Conference on Very Large Scale Integration, VLSI-SoC, pp.224 - 229, 2007-10-15 |
Performance improvement of multiprocessor simulation by optimizing synchronization and communication Chung, M.-K.; Shim, H.; Kyung, Chong-Min, 16th Intetrnational Workshop on Rapid System Prototyping, RSP 2005, pp.158 - 164, RSP '05, 2005-06-08 |
Search area selective reuse algorithm in motion estimation Shim, H.; Kang, K.; Kyung, Chong-Min, IEEE International Conference onMultimedia and Expo, ICME 2007, pp.1611 - 1614, 2007-07-02 |
Software power estimation using IPI(inter-prefetch interval) power model for advanced off-the-shelf processor Kang, K.; Kim, J.; Shim, H.; Kyung, Chong-Min, 17th Great Lakes Symposium on VLSI, GLSVLSI'07, pp.594 - 599, 2007-03-11 |
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