Browse "School of Electrical Engineering(전기및전자공학부)" by Author Park, Dongmin
Showing results 1 to 8 of 8
| A 14.2mW 2.55-to-3GHz cascaded PLL with reference injection, 800MHz delta-sigma modulator and 255fs rms integrated jitter in 0.13μm CMOS Park, Dongmin; Cho, SeongHwan, 2012 IEEE International Solid-State Circuits Conference, ISSCC 2012, pp.344 - 346, IEEE, 2012-02-22 |
| A Fractional-N Frequency Synthesizer using High-OSR Delta-Sigma Modulator and Nested-PLL Park, Pyoungwon; Park, Dongmin; Cho, SeongHwan, IEEE Custom Integrated Circuits Conference - CICC, IEEE, 2011-09-20 |
| “A ray tracing simulation to visualize atmospheric effect on wave propagation using radiosonde information Choi, Sanghyouk; Jung, Wonsik; Chun, Joohwan; Park, Dongmin; Kang, Sungchul, 2015 IEEE 5th Asia-Pacific Conference on Synthetic Aperture Radar (APSAR), APSAR, 2015-09 |
| Adaptive Beamforming for Low-Angle Target Tracking Under Multipath Interference Park, Dongmin; Yang, Eunjung; Ahn, Soyeon; Chun, Joo-Hwan, IEEE TRANSACTIONS ON AEROSPACE AND ELECTRONIC SYSTEMS, v.50, no.4, pp.2564 - 2577, 2014-10 |
| An adaptive body-biased VCO with voltage-boosted switched tuning in 0.5-V supply Park, Dongmin; Cho, SeongHwan, ESSCIRC 2006 - 32nd European Solid-State Circuits Conference, pp.444 - 447, ESSCIRC, 2006-09-19 |
| Asymmetric Sum and Difference Beam Pattern Synthesis With a Common Weight Vector Kwak, Semin; Chun, Joohwan; Park, Dongmin; Ko, Young Kwan; Cho, Byung Lae, IEEE ANTENNAS AND WIRELESS PROPAGATION LETTERS, v.15, pp.1622 - 1625, 2016 |
| Design Techniques for Ultra Low-Power Phase-Locked Loops Park, Dongmin; Cho, SeongHwan, The 54th IEEE International Midwest Symposium on Circuits and Systems, IEEE, 2011-08-08 |
| End-to-end design consideration of a radar altimeter for terrain-aided navigation Choi, Sanghyouk; Chun, Joohwan; Peak, Inchan; Park, Dongmin; Yoo, Kyungju, SAR Image Analysis, Modeling and Techniques, SPIE, 2013-09-23 |
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