Browse "School of Electrical Engineering(전기및전자공학부)" by Author Park, D.
Showing results 1 to 13 of 13
| A 2.5-GHz 860uW charge-recycling fractional-N frequency synthesizer in 130nm CMOS Park, D.; Lee, W.; Jeon, S.; Cho, SeongHwan, 2008 Symposium on VLSI Circuits Digest of Technical Papers, VLSIC, pp.82 - 83, 2008-06-18 |
| A low-power sync processor with a floating-point timer and universal edge tracer for 3DTV active shutter glasses Park, D.; Kim, Tag-Gon; Kim, C.; Kwak, S., 14th IEEE Symposium on Low-Power and High-Speed Chips, COOL Chips XIV, IEEE, 2011-04-20 |
| A power-optimized CMOS LC VCO with wide tuning range in 0.5-V supply Park, D.; Cho, SeongHwan, ISCAS 2006: 2006 IEEE International Symposium on Circuits and Systems, pp.3233 - 3236, 2006-05-21 |
| A Safe Microcontroller with Silent CRC Calculation Hardware for Code ROM Integrity Verification in IEC-60730 Class-B Park, D.; Kim, Tag-Gon; Choi, G., IEEE Global Conference on Consumer Electronics, IEEE, 2012-10 |
| A sync processor with noise robustness for 3DTV active shutter glasses Park, D.; Kim, Tag-Gon; Kim, C.; Kwak, S., 2010 International SoC Design Conference, ISOCC 2010, pp.147 - 149, ISOCC 2010, 2010-11-22 |
| Channel engineering of silicon nanowire field effect transistor: Non-equilibrium Green's function study Hong, K.-H.; Kim, J.; Lee, S.-H.; Jin, Y.-G.; Park, S.-I.; Shin, Mincheol; Suk, S.D.; et al, ICSICT-2006: 2006 8th International Conference on Solid-State and Integrated Circuit Technology, pp.1281 - 1283, 2006-10-23 |
| Discrete-Event System-on-a-Chip with Universal Event Tracer and Floating-Point Synchronizer for Interoperation of DEVS Simulator and an On-Chip Debugger Park, D.; Kim, Tag-Gon, 2012 Spring Simulation Multiconference, Symposium on Theory of Modeling and Simulation (TMS'12), Spring Simulation Multiconference, 2012-03 |
| Dynamic negative bias temperature instability and comprehensive modeling in PMOS body-tied FinFETs Lee, H.; Lee, C.-H.; Park, D.; Choi, Yang-Kyu, 44th Annual IEEE International Reliability Physics Symposium, IRPS 2006, pp.725 - 726, IEEE, 2006-03-26 |
| Negative bias temperature instability in SOI and body-tied double-gate FinFETs Lee, H.; Lee, C.-H.; Park, D.; Choi, Yang-Kyu, 2005 Symposium on VLSI Technology, pp.110 - 111, IEEE, 2005-06-14 |
| NEMS switch with 30 nm thick beam and 20 nm high air gap for high density non-volatile memory applications Kim, M.-S.; Jang, W.W.; Lee, J.-M.; Kim, S.-M.; Yun, E.-J.; Cho, K.-H.; Lee, S.-Y.; et al, 2007 International Semiconductor Device Research Symposium, ISDRS, 2007-12-12 |
| Performance-complexity tradeoffs of rateless codes Park, D.; Chung, Sae-Young, 2008 IEEE International Symposium on Information Theory, ISIT 2008, pp.2056 - 2060, IEEE, 2008-07-06 |
| The influence of gate poly-silicon oxidation on negative bias temperature instability in 3D FinFET Lee, H.; Lee, C.-H.; Park, D.; Choi, Yang-Kyu, 45th Annual IEEE International Reliability Physics Symposium 2007, IRPS, pp.680 - 681, IEEE, 2007-04-15 |
| Utilizing multipath signals using orthogonal beamforming for GPS navigation receivers Park, D.; Park, J.; Chun, Joohwan, 2010 International Conference on Consumer Electronics, ICCE 2010, pp.289 - 290, 2010 International Conference on Consumer Electronics, ICCE 2010, 2010-01-11 |
Discover
Open Access
- 573 OA Article
Date issued
- 5,094 2020 - 2024
- 18,942 2010 - 2019
- 15,019 2000 - 2009
- 7,644 1990 - 1999
- 2,391 1980 - 1989