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Single cycle access cache for the misaligned data and instruction prefetch Yim, JS; Lee, HC; Kim, TH; Park, BI; Park CJ; Park, In-Cheol, 1997 Asia and South Pacific Design Automation Conference, ASP-DAC, pp.677 - 678, 1997-01-28 |
Synthesis and optimization of interface hardware between IP's operating at different clock frequencies Park, BI; Choi, H; Park, In-Cheol; Kyung, Chong-Min, 2000 International Conference on Computer Design, pp.519 - 524, IEEE, 2000-09-17 |
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