Browse "School of Electrical Engineering(전기및전자공학부)" by Author Im, Y.H.
Showing results 1 to 7 of 7
| 3D Geometry Graphics System Using Deferred Primitive Rendering with VLIW Geometry Processor Kyung, Chong-Min; Nam, S.J.; Kwon, Y.S.; Lee, J.H.; Im, Y.H., International Conference on Consumer Electronics(ICCE), 2000-06 |
| 3D Graphics System with VLIW Processor for Geometry Acceleration Kyung, Chong-Min; Jeon, Y.W.; Kwon, Y.S.; Im, Y.H.; Lee, J.H.; Nam, S.J.; Kim, B.W., IEEE Asia Pacific Conference on ASICs(AP-ASIC'2000), pp.367 - 370, 2000-08 |
| Co-Development of Media Processor and Source-level Debugger Using Hardware Emulation Kyung, Chong-Min; Kim, B.W.; Kang, K.G.; Nam, S.J.; Im, Y.H.; Chang, S.I., International Conference on Signal Processing Application and Technology(ICSPAT), 1999-11 |
| Co-development of Media-processor and Source-level Debugger using Emulation-based Validation Kyung, Chong-Min; Im, Y.H.; Nam, S.J.; Kim, B.W.; Kang, K.G.; Lee, D.H.; Yang, J.H.; et al, International Conference on VLSI and CAD(ICVC'99), pp.95 - 98, 1999-10 |
| Fast Development of Source-level Debugging System Using Hardware Emulation Kyung, Chong-Min; Nam, S.J.; Lee, J.H.; Kim, B.W.; Im, Y.H.; Kwon, Y.S.; Kang, K.G., ASP-DAC'2000, 2000-01 |
| FLOVA:A Four0-Issue Media Processor with 3D Geometry Kyung, Chong-Min; Nam, S.J.; Kwon, Y.S.; Kim, B.W.; Im, Y.H.; Kang, K.G., International Conference on Signal Processing Application and Technology(ICSPAT), 1999-11 |
| VLIW Geometry Processor for 3D Graphics Accelearation Kyung, Chong-Min; Nam, S.J.; Kim, B.W.; Im, Y.H.; Kwon, Y.S.; Kang, K.G., Cool Chips II, pp.107 - 120, 1999-04 |
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