Showing results 51 to 68 of 68
High speed serial interface for mobile LCD driver IC Jeon, H.-K.; Kim, H.-R.; Choi, J.-M.; Hong, J.-P.; Kim, Y.-S.; Oh, H.-S.; Han, D.-K.; et al, 2008 IEEE International Symposium on Circuits and Systems, ISCAS 2008, pp.157 - 160, 2008-05-18 |
High Speed, Energy Efficient Master-Slave Flip-Flops Kim, Lee-Sup; Kim, CH, International Conference on VLSI and CAD, pp.537 - 540, 1999 |
High-data-rate DCT/IDCT architecture by parallel processing Kim, Lee-Sup; Kim, Jae Kyoon; Kim, TY, Proceedings of SPIE, Visual Communications and Image Processing, pp.895 - 905, 1994 |
High-Speed and Low-Swing On-Chip Bus Interface Using Threshold Voltage Swing Driver and Dual Sensing Amplifie Receiver Kim, Lee-Sup; Yang, BD, European Solid State Circuit Conference, 2000 |
IRAM Design for Multimedia Applications Kim, Lee-Sup; Kim, BS, Workshop on Mixing Logic and DRAM: Chips that compute and remember, Denver, 1997 |
Label-free CMOS DNA quantification with on-chip noise reduction schemes Kim, S.-J.; Shenoi, M.; Yoo, K.; Shim, J.; Chung, W.; Ko, C.; Kim, Lee-Sup; et al, 4th International Conference on Solid-State Sensors, Actuators and Microsystems, TRANSDUCERS and EUROSENSORS '07, pp.947 - 950, 2007-06-10 |
Low power 100 MHz all digital delay-locked loop Kim, BS; Kim, Lee-Sup, Proceedings of the 1997 IEEE International Symposium on Circuits and Systems, ISCAS'97. Part 4 (of 4), v.3, pp.1820 - 1823, 1997-06-09 |
Metastability of CMOS Latch/Flip-Flop Kim, Lee-Sup; Cline, Ron; Dutton, Robert, IEEE Custom Integated Circuitys Conference Proceedings, pp.26.3/1 - 26.3/4, IEEE, 1989-05-15 |
Minimized hardware architecture of fast Phong shader using Taylor series approximation in 3D graphics Shin, HC; Lee, JA; Kim, Lee-Sup, Proceedings of the 1998 IEEE International Conference on Computer Design, pp.286 - 291, 1998-10-05 |
Mode-changeable 2-D DCT/IDCT processor for digital VCR Paek, SK; Kim, JH; Kwon, BS; Chung, DH; Kim, Lee-Sup, Proceedings of the 1996 IEEE International Conference on Consumer Electronics, pp.280 - 281, 1996-06-05 |
Self-timed Shared Division and Square-root Implementation Using Full Redundant Signed Digit Numbers Kim, Lee-Sup; Lee, YS; Kang, JW; Hwang, SH, International Conference on VLSI and CAD, pp.541 - 544, 1999 |
Single-pass full-screen hardware accelerated antialiasing Lee, JA; Kim, Lee-Sup, 2000 SIGGRAPH/EUROGRAPHICS Workshop on Graphics Hardware, pp.67 - 75, 2000-08-21 |
SPAF: Sub-texel precision anisotropic filtering Shin, H.-C.; Lee, J.-A.; Kim, Lee-Sup, 2001 Workshop on Graphics Hardware, pp.99 - 107, 2001-08-12 |
Spee/Area/Power Trade-Off in the Merged-DRAM-Logic (System-on-Chip) for Real-Time Signal Processing Kim, Lee-Sup; Chang, S, International Conference on Information Systems Analysis and Synthesis, 2001 |
Tessellation-enabled shader for a bandwidth-limited 3D graphics engine Chung, K.; Yu, C.-H.; Kim, D.; Kim, Lee-Sup, IEEE 2008 Custom Integrated Circuits Conference, CICC 2008, pp.367 - 370, 2008-09-21 |
Triangle-level depth filter method for bandwidth reduction in 3D graphics hardware Yoon, J.-S.; Yu, C.-H.; Kim, D.; Kim, Lee-Sup, 2007 IEEE International Symposium on Circuits and Systems, ISCAS 2007, pp.765 - 768, 2007-05-27 |
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