Showing results 3 to 8 of 8
Communication-efficient hardware acceleration for fast functional simulation Kim, Y.-I.; Yang, W.; Kwon, Y.-S.; Kyung, Chong-Min, Proceedings of the 41st Design Automation Conference, pp.293 - 298, 2004-06-07 |
Construction of integrated simulator for developing head/eye tracking system Kim, Joungho; Lee, D.-W.; Park, C.G.; Bang, H.-C.; Kim, J.-H.; Cho, S.-Y.; Kim, Y.-I.; et al, 2008 International Conference on Control, Automation and Systems, ICCAS 2008, pp.2485 - 2488, 2008-10-14 |
iSAVE: In-system algorithm verifier for early-stage SoC verification against actual target environment Lee, J.-G.; Kim, H.-O.; Na, S.; Kim, Y.-I.; Kyung, Chong-Min, ASICON 2005: 2005 6th International Conference on ASIC, v.1, pp.110 - 113, 2005-10-24 |
Reducing transaction-level modeling effort while retaining low communication overhead for HW/SW co-emulation system Kim, Y.-I.; Chung, M.-K.; Ki, A.; Kyung, Chong-Min, 2007 International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2007, 2007-04-25 |
SmartGlue: An interface controller with auto reconfiguration for field programmable computing machine Kim, Y.-I.; Park, B.-I.; Lee, J.-G.; Kyung, Chong-Min, Proceedings of the ASP - DAC 2004 Asia and South Pacific Design Automation Conference - 2004, pp.734 - 736, 2004-01-27 |
Systematic functional coverage metric synthesis from hierarchical temporal event relation graph Kwon, Y.-S.; Kim, Y.-I.; Kyung, Chong-Min, Proceedings of the 41st Design Automation Conference, pp.45 - 48, 2004-06-07 |
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