Browse "School of Electrical Engineering(전기및전자공학부)" by Type Conference
Showing results 19041 to 19060 of 22783
| VLCSRR(Varactor-Loaded Complementary Split-Ring Resonator)를 이용한 가변 대역저지 필터 설계 명로훈; 임호, 2007 한국전자파학회 종합학술대회, pp.131 - 134, 2007 |
| VLIW Geometry Processor for 3D Graphics Accelearation Kyung, Chong-Min; Nam, S.J.; Kim, B.W.; Im, Y.H.; Kwon, Y.S.; Kang, K.G., Cool Chips II, pp.107 - 120, 1999-04 |
| VLSI architecture of List Sphere Decoder Kim H.-S.; Seo S.-H.; Park, Sin Chong, 9th International Conference on Advanced Communication Technology, ICACT 2007, v.3, pp.1693 - 1696, 2007-02-12 |
| VLSI Chips for Intelligent Speech Acquisition and Information Extraction based on Human Auditory Models Lee, Soo-Young, International Conference on Information Acquisition, pp.0 - 0, 2004-06 |
| VLSI Implementaion of Radial Basis Fuction Network with Learning Capability Choi, Y.K.; Cho, J.; Lee, Soo-Young, International Conference on Neural Information Processing, pp.1341 - 1346, 1995-10 |
| VLSI Implementation for Interpolation-based Matrix Inversion for 802.11n Receivers Park, Sin Chong, ITC-CSCC2007 |
| VLSI Implementation for Interpolation-based Matrix Inversion for MIMO-OFDM Receivers Park, Sin Chong, WSEAS |
| VLSI implementation of area-efficient list sphere decoder Lee S.; Lee J.; Park, Sin Chong, 2006 International Conference on Communication Technology, ICCT '06, 2006-11-27 |
| VLSI Implementation of Area-efficient List Sphere Decoder Park, Sin Chong, ISPACS 2006 |
| VLSI implementation of ATM layer functions for ATM UNI/NNI Choi, SH; Kim, YS; Han, YM; Park, Hong-Shik, ITC-CSCC, v.49, no.6, pp.269 - 273, 대한전자공학회, 1996 |
| VLSI implementation of decoder for decompressing fractal-based compressed image Kim, KH; Hong, CY; Kim, Lee-Sup, Proceedings of the 1998 IEEE International Symposium on Circuits and Systems, ISCAS. Part 5 (of 6), pp.221 - 224, IEEE, 1998-05-31 |
| VLSI Implementation of List Sphere Decode Park, Sin Chong, ICCCA 2006 |
| VLSI Implementation of List Sphere Decoder Park, Sin Chong, ITC-CSCC2006 |
| VLSI Implementation of Multi-Layer Bidirectional Associative Memory Choi, Y.K.; Jeong, D.G.; Lee, Soo-Young, 2nd Annual Meeting of Korean Neural Network Study Group, 1991-06 |
| VLSI implementation of Phong shader in 3D graphics Sin, HC; Lee, JA; Kim, Lee-Sup, Proceedings of the 1998 IEEE International Symposium on Circuits and Systems, ISCAS. Part 5 (of 6), pp.417 - 420, IEEE, 1998-05-31 |
| VLSI Implementation of Radial Basis Function Network with Learning Capability Lee, Soo-Young, Int. Conf. on Neural Information, pp.1341 - 1346, ICONIP, 1994-10 |
| VLSI Implementation of Tree Searching Logic in List Sphere Decoder Park, Sin Chong, ICWMMN 2006 |
| VLSI Neural Network과 Trimming Analog 회로를 위한 고속, 고분해능 CMOS 아날로그 메모리 이귀로; 김규현, 대한전자공학회 학술대회 , pp.139 - 140, 대한전자공학회, 1995 |
| VLSI Realization of Symmetric Block Matching Algorithm Kim, Seong-Dae; Kim, SY; Lee, JH, International Workshop on HDTV, pp.301 - 308, 1992 |
| VLSI Realization of Symmetric Block-Matching Algorithm Kim, Seong-Dae; Kim, SY, International Workshop on HDTV, pp.77 - 78, 1992 |
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