Browse "School of Electrical Engineering(전기및전자공학부)" by Type Conference
Showing results 6561 to 6580 of 22817
| Design and implementation of CMOS LVDS 2.5Gb/s transmitter and 1.3Gb/s receiver for optical interconnections Lee, J.; Lim, J.-W.; Song, S.-J.; Song, S.-S.; Lee, W.-J.; Yoo, Hoi-Jun, Thermoelectric Materials 2000-The Next Generation Materials for Small-Scale Refrigeration and Power Generation Applications, v.626, 2000-04-24 |
| Design and Implementation of CMOS LVDS 2.5Gb/s Transmitter and 1.3Gb/s Receiver for Optical Interconnections Yoo, Hoi-Jun; Lee, Jaeseo; Lim, J.W.; Song, S.J.; Song, S.S.; Lee, W. J., IEEE International Symposium on Circuits and Systems, pp.IV702 - IV705, 2001 |
| Design and Implementation of CMOS Transceiver for High Speed Interface 유회준; 이재서; 임재원; 송성준; 송성식; 이왕주, 한국 반도체 학술대회, pp.395 - 398, 2001 |
| Design and Implementation of Data Distribution Management in IEEE 1516 HLA/RTI Kim, Tag-Gon; Ahn, Jung Hyun; Kim, Jae Hyun, SCSC-2007, pp.386 - 391, SCSC '07, 2007-08 |
| Design and Implementation of Event-based DEVS Execution Environment for Faster Execution of Iterative Simulation Kwon, S.; Kim, Tag-Gon, 2012 Spring Simulation Multiconference, Symposium on Theory of Modeling and Simulation (TMS'12), Spring Simulation Multiconference, 2012-03 |
| Design and Implementation of GPS Spoofer Software 노주환; 김동관; 김용대, 2015 한국정보보호학회 하계 학술 대회, 한국정보보호학회, 2015-06-25 |
| Design and Implementation of Magnetically Coupled Current Probe for Monitoring Simultaneous Switching current in Package Kim, Joungho; Cho, Changhyun; Cho, Jonghyun; Kim, Jonghoon J; Pak, Jun so, 14th Electronics Packaging Technology Conference (EPTC), EPTC2012, 2012-12-05 |
| Design and Implementation of On-chip Embedded Current Probe Using Magnetic Field Coupling in Chip to Chip Wireless Power Transfer System Cho, Changhyun; Cho, Jonghyun; Kim, Myunghoi; Kim, Joungho; Pak, Jun So, 2012 IEEE MTT-S International Microwave Workshop Series (IMWS) on Innovative Wireless Power Transmission, 2012 IEEE MTT-S International Microwave Workshop Series (IMWS) on Innovative Wireless Power Transmission, 2012-05-11 |
| Design and implementation of optical pattern recognition systems using fractional Foruier transforms Jin, S.I.; Bae, Y.S.; Sin, S.K.; Lee, Soo-Young; Park, C.H.; Shin, S.Y., 96 Photonic Information Processing, 1996-11 |
| Design and implementation of path generation algorithm for controlling autonomous driving and parking Min, Kyoungwook; Chio, JungDan; Kim, Hanguen; Myung, Hyun, ICCAS 2012 (12th International Conference on Control, Automation and Systems), ICROS (Institute of Control, Robotics and Systems), 2012-10-19 |
| Design and implementation of programmable multiplierless FIR filters with powers-of-two coefficients Oh, Woo Jin; Lee, Yong-Hoon, 1993 IEEE International Symposium on Circuits and Systems, v.1, pp.88 - 91, 1993-05-03 |
| Design and Implementation of Read-Compare-Write circuits for low power Multi-Gigabit DRAM Yoo, Hoi-Jun; Choi, Sungdae; Park, Yong-Ha, International Conference on Solid State Devices and Materials, pp.256 - 257, 2002 |
| Design and Implementation of Simulators Interoperation Layer for DEVS Simulator Kim, Tag-Gon; Kim, Jae-Hyun; Hong, Su-Youn, M&S-MTSA'06, pp.195 - 199, 2006-07 |
| Design and Implementation of Time Management Service for IEEE 1516 HLA/RTI Kim, Tag-Gon; Hong, Jeong Hee; Kim, Jae Hyun, SCSC-2007, pp.379 - 385, 2007-08 |
| Design and Management in Smart Home Lim, Jong-Tae; Song, WG, 1st International Conference On Smart homes and health Telematics, Serial1, pp.33 - 37, ICOST, 2003-08 |
| Design and management of 3D-stacked NUCA cache for chip multiprocessors Jung, J.; Kang, K.; Kyung, Chong-Min, 21st Great Lakes Symposium on VLSI, GLSVLSI 2011, pp.91 - 96, ACM, 2011-05-02 |
| Design and Measurement of a Compact On-interposer Passive Equalizer for Chip-to-chip High-speed Differential Signaling Kim, Joungho; Kim, Heegon; Cho, Jonghyun; Jung, Daniel H; Kim, Jonghoon J; Choi, Sumin; Lee, Junho; et al, IEEE Electromagnetic Compatibility of Integrated Circuits(EMC Compo), pp.5 - 9, IEEE Electromagnetic Compatibility of Integrated Circuits(EMC Compo), 2013-12-15 |
| Design and Modeling of a Four-Terminal InGaP/GaAs HBT Power Cell 홍성철; 이동호; 이경애; 박현민; 전상훈; 박재우, 제 11회 한국반도체 학술대회, pp.177 - 178, 2004 |
| Design and optimization of mesh clock network with multi-level clock gating 정진욱; 이동수; 신영수, 한국반도체학술대회, 대한전자공학회, 2014-02-25 |
| Design and optimization of multiple-mesh clock network Shin, Youngsoo; Jung, Jinwook; Lee, Dongsoo, International Conference on Very Large Scale Integration (VLSI-SoC), , pp.171 - 176, IFIP, IEEE, 2014-10 |
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