Wired and wireless power distribution network (PDN) modeling, design and measurement for 3D package and IC3차원 패키지 집적회로에서의 유선 및 무선 전력 분배망 모델링, 설계 및 측정

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dc.contributor.advisorKim, Joung-Ho-
dc.contributor.advisor김정호-
dc.contributor.authorSong, Eun-Seok-
dc.contributor.author송은석-
dc.date.accessioned2015-04-23T06:12:58Z-
dc.date.available2015-04-23T06:12:58Z-
dc.date.issued2014-
dc.identifier.urihttp://library.kaist.ac.kr/search/detail/view.do?bibCtrlNo=591830&flag=dissertation-
dc.identifier.urihttp://hdl.handle.net/10203/196592-
dc.description학위논문(박사) - 한국과학기술원 : 전기및전자공학과, 2014.8, [ vii, 72p ]-
dc.description.abstractIn this dissertation, a structure and plan for improving the performance of power distribution networks (PDNs) in 3D packages and integrated circuits is proposed and modeling, designing, and measuring power distribution networks are implemented. PDNs in 3D packages and integrated circuits can be classified into wired and wireless types. In general, 3D integrated circuits based on a through-silicon-via (TSV) technology have been highlighted for improving the characteristics in PDNs. In this study, a decoupling capacitor stacked chip structure based on the TSV technology is proposed and decoupling capacitors, TSV, and chip power distribution networks are separately modeled based on a segmentation method. Then, an integration method for the modeling is applied. The proposed TSV technology based decoupling capacitor stacked chip structure is modeled using the segmentation method and the model accuracy is also verified through measurements. Regarding the conventional methods in decoupling capacitors including package decoupling capacitors, on-chip metal-oxide-semiconductor (MOS) capacitors, deep trench (DT) capacitors, and metal-insulator-metal (MIM) capacitors, the proposed DCSC structure represents excellent characteristics in the aspects of power distribution impedances ($Z_{11}$), leakage currents, capacitances, chip areas, and TSV arrangements. The proposed TSV technology based decoupling capacitor stacked chip structure may become an excellent decoupling capacitor for improving the performance of wired power distribution networks in 3D package integrated circuits. A wireless power transfer (WPT) technology is used for a wireless power distribution network in 3D package and IC. It is important to perform a structure that miniaturizes inductors and reduces simultaneous switching noise (SSN) and to optimize its design in order to implement the wireless power transfer technology using inductive coupling for such packages. The wireless power transfer circuit in 3...eng
dc.languageeng-
dc.publisher한국과학기술원-
dc.subject3D package and IC-
dc.subject시스템 면적 증가-
dc.subject동시 스위칭 노이즈-
dc.subject무선 전력 분배망-
dc.subject유선 전력 분배망-
dc.subject무선전력전송-
dc.subjectpower distribution network-
dc.subjectdecoupling capacitor stacked chip (DCSC)-
dc.subjectwireless power transfer (WPT)-
dc.subjectwired PDN-
dc.subjectwireless PDN-
dc.subjectsimultaneous switching noise-
dc.subjectsystem area burden-
dc.subject3차원 패키지 집적회로-
dc.subject전력 분배망-
dc.subject디커플링 캐패시터 적층 칩-
dc.titleWired and wireless power distribution network (PDN) modeling, design and measurement for 3D package and IC-
dc.title.alternative3차원 패키지 집적회로에서의 유선 및 무선 전력 분배망 모델링, 설계 및 측정-
dc.typeThesis(Ph.D)-
dc.identifier.CNRN591830/325007 -
dc.description.department한국과학기술원 : 전기및전자공학과, -
dc.identifier.uid020105104-
dc.contributor.localauthorKim, Joung-Ho-
dc.contributor.localauthor김정호-
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EE-Theses_Ph.D.(박사논문)
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