A Multi-Band CMOS hybrid-EER power amplifier for mobile applications휴대 단말용 다중대역 CMOS Hybrid-EER 전력증폭기 설계

Cited 0 time in webofscience Cited 0 time in scopus
  • Hit : 419
  • Download : 0
DC FieldValueLanguage
dc.contributor.advisorPark, Chul-Soon-
dc.contributor.advisor박철순-
dc.contributor.authorKim, Woo-Young-
dc.contributor.author김우영-
dc.date.accessioned2015-04-23T06:12:27Z-
dc.date.available2015-04-23T06:12:27Z-
dc.date.issued2014-
dc.identifier.urihttp://library.kaist.ac.kr/search/detail/view.do?bibCtrlNo=568564&flag=dissertation-
dc.identifier.urihttp://hdl.handle.net/10203/196528-
dc.description학위논문(박사) - 한국과학기술원 : 전기및전자공학과, 2014.2, [ xi, 90 p. ]-
dc.description.abstractFor the multi-band CMOS hybrid-EER power amplifier (PA) for mobile application, a triple-band CMOS power amplifier is designed and, to compensate nonlinearity of the supply modulated structure, a common-gate voltage modulation (CGVM) on-chip linearizer is integrated in the circuit. To support multi-band/multi-mode operations, the hybrid-EER is implemented with the multi-mode envelope amplifier (EA) and the multi-band power amplifier. The designed PA is fabricated with CMOS process and fully integrated the EA and the PA on a single chip. Firstly, the proposed triple-band PA is applied two techniques to operate multi-band operation with a power-cell resizing and a multi-tap transformer. To operate optimum class-E mode, the required capacitance and inductance are realized with parasitic capacitance of power cells and the variable inductance of a transmission line transformer (TLT) using multi-taps with supply voltage biasing. The designed PA operates 800 MHz and 1.9/2.3 GHz with high power added efficiency (PAE) of 40/45/37 % and output power of 28/29.6/26.5 dBm. Secondly, the nonlinearity of the supply modulated scheme is generated with the nonlinear output capacitance and the variation of the output resistance as a function of the supply voltage. This nonlinearity produces AM-to-AM and AM-to-PM distortions and the third-order intermodulation (IM3) distortion. To improve the nonlinearity, the CGVM scheme is applied to the gate bias of the common-gate stage of the cascode amplifier in the designed PA. The on-chip linearizer is integrated with a linear regulator using an OP-AMP. The shaped envelope can control the common-gate stage operated in the saturation region to keep the load resistance constant value. To apply the proposed technique, the linearity are improved 4.5 dB (WCDMA) and 3 dB (LTE) signals. Thirdly, the multi-band CMOS H-EER PA is designed in a single chip using CMOS process for 3G and 4G mobile applications. The input/output matching networks are i...eng
dc.languageeng-
dc.publisher한국과학기술원-
dc.subjectmulti-band-
dc.subjectwcdma-
dc.subjectlte-
dc.subjectcmos-
dc.subjectPower amplier-
dc.subject전력증폭기-
dc.subject다중대역-
dc.titleA Multi-Band CMOS hybrid-EER power amplifier for mobile applications-
dc.title.alternative휴대 단말용 다중대역 CMOS Hybrid-EER 전력증폭기 설계-
dc.typeThesis(Ph.D)-
dc.identifier.CNRN568564/325007 -
dc.description.department한국과학기술원 : 전기및전자공학과, -
dc.identifier.uid020078055-
dc.contributor.localauthorPark, Chul-Soon-
dc.contributor.localauthor박철순-
Appears in Collection
EE-Theses_Ph.D.(박사논문)
Files in This Item
There are no files associated with this item.

qr_code

  • mendeley

    citeulike


rss_1.0 rss_2.0 atom_1.0