Advancing electronic packaging using microsolder balls: Making 25-nm pitch interconnection possible

Abstract

Electronic packaging technology has advanced in the direction of integrating diverse components into one package to satisfy market demands for multifunctionality as well as portability [1], [2]. For this reason, various packaging structures have been introduced, such as multichip modules, package on package, package in package, and eventually three-dimensional (3-D)-chip stacks [3]?[6]. All of these approaches require increased input/output (I/O) counts, resulting in fine-pitch assembly [7], [8]. Therefore, the most critical issue in current electronic packaging is how to assemble fine-pitch components while avoiding an electrical short circuit in the x?y direction [8]?[12]. Much research has been done on fine-pitch interconnecting technology using microsolder balls smaller than 200 nm, but the problems of solder-ball handling and low yield remain [13]?[16]. In addition, there have been few reports so far about the fine-pitch interconnection below 25-nm pitch using microsolder balls. Three-dimensional-chip stacks require an additional microsolder and copper hybrid bumping and patterning processes on through silicon via (TSV), which increases the processing cost [7], [12], [17].