Small-Size Low-Cost Wideband Continuous-Time Linear Passive Equalizer With an Embedded Cavity Structure on a High-Speed Digital Channel

Cited 6 time in webofscience Cited 5 time in scopus
  • Hit : 677
  • Download : 14
DC FieldValueLanguage
dc.contributor.authorShin, Min-Chulko
dc.contributor.authorKim, Myunghoiko
dc.contributor.authorKim, Ji-Seongko
dc.contributor.authorKim, Jounghoko
dc.contributor.authorAhn, Seungyoungko
dc.date.accessioned2014-09-01T07:42:50Z-
dc.date.available2014-09-01T07:42:50Z-
dc.date.created2012-07-03-
dc.date.created2012-07-03-
dc.date.issued2014-01-
dc.identifier.citationIEEE TRANSACTIONS ON COMPONENTS PACKAGING AND MANUFACTURING TECHNOLOGY, v.4, no.1, pp.94 - 99-
dc.identifier.issn2156-3950-
dc.identifier.urihttp://hdl.handle.net/10203/189331-
dc.description.abstractThis paper proposes a wideband continuous-time passive equalizer with an embedded cavity structure that is more compact in size and enables lower-cost processing than conventional technologies. The proposed passive equalizer is composed of a lumped resistor and capacitance in a cavity structure generated by a parasitic channel parasitic component, such as a package ball pad. This equalizer design in which the capacitance is embedded in the cavity structure offers the advantages of reducing the additional occupied printed circuit board (PCB) area and of enabling a small-sized equalizer with a large capacitance for application in high-density systems. For a 40-cm transmission line on PCB with a data rate of 12.5 Gb/s, the measured eye diagram is successfully demonstrated and the eye opening significantly improved to 81.1 mV, with a timing jitter of 28.7 ps.-
dc.languageEnglish-
dc.publisherIEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC-
dc.subjectDESIGN-
dc.subjectCAPACITANCE-
dc.subjectMODEL-
dc.subjectGBPS-
dc.titleSmall-Size Low-Cost Wideband Continuous-Time Linear Passive Equalizer With an Embedded Cavity Structure on a High-Speed Digital Channel-
dc.typeArticle-
dc.identifier.wosid000329518500011-
dc.identifier.scopusid2-s2.0-84892432707-
dc.type.rimsART-
dc.citation.volume4-
dc.citation.issue1-
dc.citation.beginningpage94-
dc.citation.endingpage99-
dc.citation.publicationnameIEEE TRANSACTIONS ON COMPONENTS PACKAGING AND MANUFACTURING TECHNOLOGY-
dc.identifier.doi10.1109/TCPMT.2013.2257927-
dc.embargo.liftdate9999-12-31-
dc.embargo.terms9999-12-31-
dc.contributor.localauthorKim, Joungho-
dc.contributor.localauthorAhn, Seungyoung-
dc.type.journalArticleArticle-
dc.subject.keywordAuthorCavity capacitance-
dc.subject.keywordAuthorchannel loss-
dc.subject.keywordAuthoreye diagram-
dc.subject.keywordAuthorinter symbol interference (ISI)-
dc.subject.keywordAuthorpassive equalizer-
dc.subject.keywordAuthorsignal integrity-
dc.subject.keywordPlusDESIGN-
dc.subject.keywordPlusCAPACITANCE-
dc.subject.keywordPlusMODEL-
dc.subject.keywordPlusGBPS-
This item is cited by other documents in WoS
⊙ Detail Information in WoSⓡ Click to see webofscience_button
⊙ Cited 6 items in WoS Click to see citing articles in records_button

qr_code

  • mendeley

    citeulike


rss_1.0 rss_2.0 atom_1.0