A time-domain latch interpolation technique for low power flash ADCs
| DC Field | Value | Language |
|---|---|---|
| dc.contributor.author | Kim, Join-In | ko |
| dc.contributor.author | Kim, Wan | ko |
| dc.contributor.author | Sung, Barosaim | ko |
| dc.contributor.author | Ryu, Seung-Tak | ko |
| dc.date.accessioned | 2014-08-26T06:04:57Z | - |
| dc.date.available | 2014-08-26T06:04:57Z | - |
| dc.date.created | 2012-12-02 | - |
| dc.date.created | 2012-12-02 | - |
| dc.date.created | 2012-12-02 | - |
| dc.date.issued | 2011-09-20 | - |
| dc.identifier.citation | 2011 IEEE Custom Integrated Circuits Conference | - |
| dc.identifier.uri | http://hdl.handle.net/10203/187009 | - |
| dc.language | English | - |
| dc.publisher | IEEE | - |
| dc.title | A time-domain latch interpolation technique for low power flash ADCs | - |
| dc.type | Conference | - |
| dc.identifier.wosid | 000296981700123 | - |
| dc.identifier.scopusid | 2-s2.0-80455129444 | - |
| dc.type.rims | CONF | - |
| dc.citation.publicationname | 2011 IEEE Custom Integrated Circuits Conference | - |
| dc.identifier.conferencecountry | US | - |
| dc.identifier.conferencelocation | San Jose | - |
| dc.contributor.localauthor | Ryu, Seung-Tak | - |
| dc.contributor.nonIdAuthor | Kim, Join-In | - |
| dc.contributor.nonIdAuthor | Kim, Wan | - |
| dc.contributor.nonIdAuthor | Sung, Barosaim | - |
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