DC Field | Value | Language |
---|---|---|
dc.contributor.advisor | Yi, Yung | - |
dc.contributor.advisor | 이융 | - |
dc.contributor.author | Lee, Ji-Hyeong | - |
dc.contributor.author | 이지형 | - |
dc.date.accessioned | 2013-09-12T02:00:18Z | - |
dc.date.available | 2013-09-12T02:00:18Z | - |
dc.date.issued | 2011 | - |
dc.identifier.uri | http://library.kaist.ac.kr/search/detail/view.do?bibCtrlNo=482810&flag=dissertation | - |
dc.identifier.uri | http://hdl.handle.net/10203/180936 | - |
dc.description | 학위논문(석사) - 한국과학기술원 : 전기 및 전자공학과, 2011.8, [ iv, 27 p. ] | - |
dc.language | eng | - |
dc.publisher | 한국과학기술원 | - |
dc.subject | packet I/O | - |
dc.subject | intrusion detection | - |
dc.subject | IDS | - |
dc.subject | nework | - |
dc.subject | 침입탐지 | - |
dc.subject | 패킷 입출력 | - |
dc.subject | 침입탐지시스템 | - |
dc.subject | 네트워크 | - |
dc.subject | 보안 | - |
dc.subject | security | - |
dc.title | Multi-core multi-threaded packet i/o architecture for high-speed network intrusion detection system | - |
dc.title.alternative | 고속 네트워크 침입탐지시스템을 위한 멀티코어 멀티스레드 기반의 패킷 입출력 아키텍처 | - |
dc.type | Thesis(Master) | - |
dc.identifier.CNRN | 482810/325007 | - |
dc.description.department | 한국과학기술원 : 전기 및 전자공학과, | - |
dc.identifier.uid | 020094251 | - |
dc.contributor.localauthor | Yi, Yung | - |
dc.contributor.localauthor | 이융 | - |
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