Timing consistency checking for UML/MARTE behavioral models of real-time embedded software

Abstract

As Real-Time Embedded Software (RTES) has been rapidly grown in size and complexity, timing behavioral modeling is desirable to manage its complexity and safety. UML behavioral models with MARTE annotations are used to describe timing behaviors and timing characteristics of RTES. Especially, state machine, sequence, and timing diagrams with MARTE annotations are appropriate to understand and analyze timing behaviors of RTES. However, to guarantee software correctness and safety, timing inconsistencies in UML/MARTE should be identified in the design phase of RTES. UML/MARTE timing inconsistencies are related to modeling errors and can be hazards throughout the lifecycle of RTES. In this thesis, we propose a systematic approach to checking timing consistency of state machine, sequence, and timing diagrams with MARTE annotations for RTES. We first suggest modeling guidelines for state machine, sequence, and timing diagrams with MARTE annotations. To overcome informal semantics of UML/MARTE models, we provide formal definitions of state machine, sequence, and timing diagrams with MARTE annotations. Then we present the timing consistency checking approach that consists of rule-based and model checking-based timing consistency checking. In the rule-based timing consistency checking, we validate well-formedness of UML/MARTE behavioral models in timing aspects. To this end, we define intra-model and inter-model consistency checking rules for UML/MARTE models. In the model checking-based timing consistency checking, we verify whether timing behaviors of sequence and timing diagrams with MARTE annotations are consistent with the timing behaviors of state machine diagrams with MARTE annotations. For this purpose, timed automata models are transformed from state machine diagrams with MARTE annotations. Timing properties to be verified are extracted from sequence and timing diagrams with MARTE annotations. We support an automated timing consistency checking tool UMCA (Uml/...