Revisiting Shared Cache Contention Problems: A Practical Hardware-Software Cooperative Approach

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Although shared caches allow the dynamic allocation of limited cache capacity among cores, traditional LRU replacement policies often cannot prevent negative interference among cores. To address the contention problem in shared caches, cache partitioning and application scheduling techniques have been extensively studied. Partitioning explicitly determines cache capacity for each core to maximize the overall throughput. On the other hand, application scheduling by operating systems groups the least interfering applications for each shared cache, when multiple shared caches exist in systems. Although application scheduling can mitigate the contention problem without any extra hardware support, its effect can be limited for some severe contentions. This paper proposes a low cost solution, based on application scheduling with a simple cache insertion control. Instead of using a full hardware-based cache partitioning mechanism, the proposed technique mostly relies on application scheduling. It selectively uses LRU insertion to the shared caches, which can be added with negligible hardware changes from the current commercial processor designs. For the completeness of cache interference evaluation, this paper examines all possible mixes from a set of applications, instead of using a just few selected mixes. The evaluation shows that the proposed technique can mitigate the cache contention problem effectively, close to the ideal scheduling and partitioning.
Publisher
IEICE-INST ELECTRONICS INFORMATION COMMUNICATIONS ENG
Issue Date
2013-07
Language
English
Article Type
Article
Keywords

MEMORY

Citation

IEICE TRANSACTIONS ON INFORMATION AND SYSTEMS, v.E96D, no.7, pp.1457 - 1466

ISSN
0916-8532
DOI
10.1587/transinf.E96.D.1457
URI
http://hdl.handle.net/10203/175558
Appears in Collection
CS-Journal Papers(저널논문)
Files in This Item
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