DC Field | Value | Language |
---|---|---|
dc.contributor.author | Ahn, Jung-Sang | ko |
dc.contributor.author | Kang, Dong-Won | ko |
dc.contributor.author | Jung, Da-Woon | ko |
dc.contributor.author | Kim, Jin-Soo | ko |
dc.contributor.author | Maeng, Seung-Ryoul | ko |
dc.date.accessioned | 2013-04-11T07:49:07Z | - |
dc.date.available | 2013-04-11T07:49:07Z | - |
dc.date.created | 2013-04-09 | - |
dc.date.created | 2013-04-09 | - |
dc.date.issued | 2013-04 | - |
dc.identifier.citation | IEEE TRANSACTIONS ON COMPUTERS, v.62, no.4, pp.784 - 797 | - |
dc.identifier.issn | 0018-9340 | - |
dc.identifier.uri | http://hdl.handle.net/10203/173429 | - |
dc.description.abstract | As NAND flash memory is gaining popularity as a storage medium for mobile embedded devices, many flash-aware file systems, flash-aware DBMSes, and flash translation layers (FTLs) require an flash-efficient index structure. This paper proposes a novel index structure called mu*-Tree which natively works on NAND flash memory, aiming at improving performance over B+-Tree. mu*-Tree stores all the nodes along the path from the root to the leaf into a single flash memory page in order to minimize the number of flash write operation when a node is updated. Furthermore, mu*-Tree has an adaptive page layout scheme which dynamically adjusts the page layout according to the workload characteristics on-the-fly. mu*-Tree also allows flash pages with different page layouts to coexist in the same tree. Our evaluation results with real workload traces show that mu*-Tree outperforms B+-Tree by up to 55 percent in terms of the time needed for flash operations. With a small in-memory cache of 32 KB, mu*-Tree improves the overall performance by up to five times compared to B+-Tree with the same cache size. | - |
dc.language | English | - |
dc.publisher | IEEE COMPUTER SOC | - |
dc.title | mu*-Tree: An Ordered Index Structure for NAND Flash Memory with Adaptive Page Layout Scheme | - |
dc.type | Article | - |
dc.identifier.wosid | 000315959200012 | - |
dc.identifier.scopusid | 2-s2.0-84874998707 | - |
dc.type.rims | ART | - |
dc.citation.volume | 62 | - |
dc.citation.issue | 4 | - |
dc.citation.beginningpage | 784 | - |
dc.citation.endingpage | 797 | - |
dc.citation.publicationname | IEEE TRANSACTIONS ON COMPUTERS | - |
dc.identifier.doi | 10.1109/TC.2012.20 | - |
dc.contributor.localauthor | Maeng, Seung-Ryoul | - |
dc.contributor.nonIdAuthor | Ahn, Jung-Sang | - |
dc.contributor.nonIdAuthor | Kang, Dong-Won | - |
dc.contributor.nonIdAuthor | Jung, Da-Woon | - |
dc.contributor.nonIdAuthor | Kim, Jin-Soo | - |
dc.type.journalArticle | Article | - |
dc.subject.keywordAuthor | NAND flash memory | - |
dc.subject.keywordAuthor | index structure | - |
dc.subject.keywordAuthor | B+-Tree | - |
dc.subject.keywordPlus | B-TREE | - |
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