DC Field | Value | Language |
---|---|---|
dc.contributor.author | 신영수 | - |
dc.date.accessioned | 2013-03-29T18:21:56Z | - |
dc.date.available | 2013-03-29T18:21:56Z | - |
dc.date.created | 2012-12-03 | - |
dc.date.issued | 2012-02 | - |
dc.identifier.citation | 한국반도체학술대회, v., no., pp. - | - |
dc.identifier.uri | http://hdl.handle.net/10203/172775 | - |
dc.language | KOR | - |
dc.publisher | 한국반도체학회 | - |
dc.title | Clock gating: design or synthesis? | - |
dc.type | Conference | - |
dc.type.rims | CONF | - |
dc.citation.publicationname | 한국반도체학술대회 | - |
dc.identifier.conferencecountry | South Korea | - |
dc.contributor.localauthor | 신영수 | - |
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