Design and management of 3D-stacked NUCA cache for chip multiprocessors
| DC Field | Value | Language |
|---|---|---|
| dc.contributor.author | Jung, J. | - |
| dc.contributor.author | Kang, K. | - |
| dc.contributor.author | Kyung, Chong-Min | - |
| dc.date.accessioned | 2013-03-28T12:34:24Z | - |
| dc.date.available | 2013-03-28T12:34:24Z | - |
| dc.date.created | 2012-02-06 | - |
| dc.date.issued | 2011-05-02 | - |
| dc.identifier.citation | 21st Great Lakes Symposium on VLSI, GLSVLSI 2011, v., no., pp.91 - 96 | - |
| dc.identifier.uri | http://hdl.handle.net/10203/165735 | - |
| dc.language | ENG | - |
| dc.publisher | ACM | - |
| dc.title | Design and management of 3D-stacked NUCA cache for chip multiprocessors | - |
| dc.type | Conference | - |
| dc.identifier.scopusid | 2-s2.0-79957785400 | - |
| dc.type.rims | CONF | - |
| dc.citation.beginningpage | 91 | - |
| dc.citation.endingpage | 96 | - |
| dc.citation.publicationname | 21st Great Lakes Symposium on VLSI, GLSVLSI 2011 | - |
| dc.identifier.conferencecountry | Switzerland | - |
| dc.identifier.conferencecountry | Switzerland | - |
| dc.contributor.localauthor | Kyung, Chong-Min | - |
| dc.contributor.nonIdAuthor | Jung, J. | - |
| dc.contributor.nonIdAuthor | Kang, K. | - |
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