Maximizing throughput of temperature-constrained multi-core systems with 3D-stacked cache memory
| DC Field | Value | Language |
|---|---|---|
| dc.contributor.author | Kang, K. | ko |
| dc.contributor.author | Jung, J. | ko |
| dc.contributor.author | Yoo, S. | ko |
| dc.contributor.author | Kyung, Chong-Min | ko |
| dc.date.accessioned | 2013-03-28T09:03:46Z | - |
| dc.date.available | 2013-03-28T09:03:46Z | - |
| dc.date.created | 2012-02-06 | - |
| dc.date.created | 2012-02-06 | - |
| dc.date.issued | 2011-03-14 | - |
| dc.identifier.citation | 12th International Symposium on Quality Electronic Design, ISQED 2011, pp.577 - 582 | - |
| dc.identifier.uri | http://hdl.handle.net/10203/164352 | - |
| dc.language | English | - |
| dc.publisher | 12th International Symposium on Quality Electronic Design, ISQED 2011 | - |
| dc.title | Maximizing throughput of temperature-constrained multi-core systems with 3D-stacked cache memory | - |
| dc.type | Conference | - |
| dc.identifier.wosid | 000299054300092 | - |
| dc.identifier.scopusid | 2-s2.0-79959228502 | - |
| dc.type.rims | CONF | - |
| dc.citation.beginningpage | 577 | - |
| dc.citation.endingpage | 582 | - |
| dc.citation.publicationname | 12th International Symposium on Quality Electronic Design, ISQED 2011 | - |
| dc.identifier.conferencecountry | US | - |
| dc.identifier.conferencelocation | Santa Clara, CA | - |
| dc.contributor.localauthor | Kyung, Chong-Min | - |
| dc.contributor.nonIdAuthor | Kang, K. | - |
| dc.contributor.nonIdAuthor | Jung, J. | - |
| dc.contributor.nonIdAuthor | Yoo, S. | - |
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