Low-power and high-speed SerDes with new dynamic latch and flip-flop for optical interconnect in 180 nm CMOS technology

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dc.contributor.authorSangirov, Jko
dc.contributor.authorUkaegbu, IAko
dc.contributor.authorLee, Tae Wooko
dc.contributor.authorCho, Mu Heeko
dc.contributor.authorPark, HyoHoonko
dc.date.accessioned2013-03-28T08:47:39Z-
dc.date.available2013-03-28T08:47:39Z-
dc.date.created2012-02-06-
dc.date.created2012-02-06-
dc.date.issued2011-01-24-
dc.identifier.citationOptoelectronic Interconnects and Component Integration XI-
dc.identifier.urihttp://hdl.handle.net/10203/164258-
dc.languageEnglish-
dc.publisherOptoelectronic Interconnects and Component Integration XI-
dc.titleLow-power and high-speed SerDes with new dynamic latch and flip-flop for optical interconnect in 180 nm CMOS technology-
dc.typeConference-
dc.identifier.wosid000298241900027-
dc.identifier.scopusid2-s2.0-79953677197-
dc.type.rimsCONF-
dc.citation.publicationnameOptoelectronic Interconnects and Component Integration XI-
dc.identifier.conferencecountryUS-
dc.identifier.conferencelocationSan Francisco, CA-
dc.contributor.localauthorPark, HyoHoon-
dc.contributor.nonIdAuthorSangirov, J-
dc.contributor.nonIdAuthorUkaegbu, IA-
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EE-Conference Papers(학술회의논문)
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