QC-LDPC Decoding Architecture based on Stride Scheduling
| DC Field | Value | Language |
|---|---|---|
| dc.contributor.author | Kim, B. | ko |
| dc.contributor.author | Park, In-Cheol | ko |
| dc.date.accessioned | 2013-03-28T07:43:16Z | - |
| dc.date.available | 2013-03-28T07:43:16Z | - |
| dc.date.created | 2012-02-06 | - |
| dc.date.created | 2012-02-06 | - |
| dc.date.issued | 2011-05-15 | - |
| dc.identifier.citation | 2011 IEEE International Symposium of Circuits and Systems, ISCAS 2011, pp.1319 - 1322 | - |
| dc.identifier.issn | 0271-4310 | - |
| dc.identifier.uri | http://hdl.handle.net/10203/163903 | - |
| dc.language | English | - |
| dc.publisher | IEEE | - |
| dc.title | QC-LDPC Decoding Architecture based on Stride Scheduling | - |
| dc.type | Conference | - |
| dc.identifier.wosid | 000297265301135 | - |
| dc.identifier.scopusid | 2-s2.0-79960881197 | - |
| dc.type.rims | CONF | - |
| dc.citation.beginningpage | 1319 | - |
| dc.citation.endingpage | 1322 | - |
| dc.citation.publicationname | 2011 IEEE International Symposium of Circuits and Systems, ISCAS 2011 | - |
| dc.identifier.conferencecountry | BL | - |
| dc.identifier.conferencelocation | Rio de Janeiro | - |
| dc.contributor.localauthor | Park, In-Cheol | - |
| dc.contributor.nonIdAuthor | Kim, B. | - |
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