Timing analysis of dual-edge-triggered flip-flop based circuits with clock gating
| DC Field | Value | Language |
|---|---|---|
| dc.contributor.author | Oh, C. | - |
| dc.contributor.author | Kim, S. | - |
| dc.contributor.author | Shin, Youngsoo | - |
| dc.date.accessioned | 2013-03-27T00:34:41Z | - |
| dc.date.available | 2013-03-27T00:34:41Z | - |
| dc.date.created | 2012-02-06 | - |
| dc.date.issued | 2009-05-18 | - |
| dc.identifier.citation | 2009 IEEE International Conference on Integrated Circuit Design and Technology, ICICDT 2009, v., no., pp.59 - 62 | - |
| dc.identifier.uri | http://hdl.handle.net/10203/157542 | - |
| dc.language | ENG | - |
| dc.title | Timing analysis of dual-edge-triggered flip-flop based circuits with clock gating | - |
| dc.type | Conference | - |
| dc.identifier.scopusid | 2-s2.0-77950303983 | - |
| dc.type.rims | CONF | - |
| dc.citation.beginningpage | 59 | - |
| dc.citation.endingpage | 62 | - |
| dc.citation.publicationname | 2009 IEEE International Conference on Integrated Circuit Design and Technology, ICICDT 2009 | - |
| dc.identifier.conferencecountry | United States | - |
| dc.identifier.conferencecountry | United States | - |
| dc.contributor.localauthor | Shin, Youngsoo | - |
| dc.contributor.nonIdAuthor | Oh, C. | - |
| dc.contributor.nonIdAuthor | Kim, S. | - |
- Appears in Collection
- EE-Conference Papers(학술회의논문)
- Files in This Item
- There are no files associated with this item.
Items in DSpace are protected by copyright, with all rights reserved, unless otherwise indicated.