Implementation of a high-throughput and area-efficient MIMO detector based on modified Dijkstra's search

Abstract

This paper presents a VLSI implementation of a high-throughput and area-efficient MIMO detector. We propose a modified Dijkstra's algorithm and a pre-calculation technique to improve the throughput by allowing overlapped processing. In addition, we propose a simple approximation of L-2-norm to reduce the computational complexity without degrading the error performance noticeably. A MIMO detector based on the proposed algorithm is implemented using a 0.18-mu m CMOS technology, which occupies 0.49 mm(2) with 25.1K equivalent gates and shows a throughput of over 300 Mbps.