Frequency and yield optimization using power gates in power-constrained designs

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Issue Date
2009-08-19
Language
ENG
Citation

2009 ACM/IEEE International Symposium on Low Power Electronics and Design, ISLPED'09, pp.121 - 126

URI
http://hdl.handle.net/10203/156192
Appears in Collection
EE-Conference Papers(학술회의논문)
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