PC 클러스터를 위한 정렬 중첩 격자의 병렬처리PARALLEL IMPROVEMENT IN STRUCTURED CHIMERA GRID ASSEMBLY FOR PC CLUSTER

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dc.contributor.author김유진-
dc.contributor.author권장혁-
dc.date.accessioned2013-03-18T19:51:55Z-
dc.date.available2013-03-18T19:51:55Z-
dc.date.created2012-02-06-
dc.date.issued2005-10-
dc.identifier.citation한국전산유체공학회 2005년도 추계 학술대회, v., no., pp.157 - 162-
dc.identifier.urihttp://hdl.handle.net/10203/151892-
dc.description.abstractParallel implementation and performance assessment of the grid assembly in a structured chimera grid approach is studied. The grid assembly process, involving hole cutting and searching donor, is parallelized on the PC cluster. A message passing programming model based on the MPI library is implemented using the single program multiple data(SPMD) paradigm. The coarse-grained communication is optimized with the minimized memory allocation because that the parallel grid assembly can access the decomposed geometry data in other processors by only message passing in the distributed memory system such as a PC cluster. The grid assembly workload is based on the static load balancing tied to flow solver. A goal of this work is a development of parallelized grid assembly that is suited for handling multiple moving body problems with large grid size.-
dc.languageKOR-
dc.publisher한국전산유체공학회-
dc.titlePC 클러스터를 위한 정렬 중첩 격자의 병렬처리-
dc.title.alternativePARALLEL IMPROVEMENT IN STRUCTURED CHIMERA GRID ASSEMBLY FOR PC CLUSTER-
dc.typeConference-
dc.type.rimsCONF-
dc.citation.beginningpage157-
dc.citation.endingpage162-
dc.citation.publicationname한국전산유체공학회 2005년도 추계 학술대회-
dc.identifier.conferencecountrySouth Korea-
dc.identifier.conferencecountrySouth Korea-
dc.contributor.localauthor권장혁-
dc.contributor.nonIdAuthor김유진-
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AE-Conference Papers(학술회의논문)
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