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A simulation study on lot release control, mask scheduling, and batch scheduling in semiconductor wafer fabrication facilities Kim, Yeong-Dae; Lee, DH; Kim, JU; Roh, HK, JOURNAL OF MANUFACTURING SYSTEMS, v.17, no.2, pp.107 - 117, 1998 |
(A) study on the production control policies considering WIP balance and setup time in a semiconductor fabrication line = 반도체 생산 공정에서 재공재고 균형과 셋업 시간을 고려한 생산 계획 연구link Kim, Se-Jung; 김세정; et al, 한국과학기술원, 2006 |
Due-date based scheduling and control policies in a multiproduct semiconductor wafer fabrication facility Kim, Yeong-Dae; Kim, JU; Lim, SK; Jun, HB, IEEE TRANSACTIONS ON SEMICONDUCTOR MANUFACTURING, v.11, no.1, pp.155 - 164, 1998-02 |
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