An optimum mapping of IPs for On-Chip Network design based on the minimum latency constraint
- Issue Date
- 2005-11-21
- Language
- ENG
- Citation
TENCON 2005 - 2005 IEEE Region 10 Conference, v.2007
- Appears in Collection
- EE-Conference Papers(학술회의논문)
- Files in This Item
- There are no files associated with this item.
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