SoC design environment with automated configurable bus generation for rapid prototyping

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Issue Date
2005-10-24
Language
ENG
Citation

ASICON 2005: 2005 6th International Conference on ASIC, v.1, pp.122 - 125

URI
http://hdl.handle.net/10203/143135
Appears in Collection
EE-Conference Papers(학술회의논문)
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