A quad-channel 3.125Gb/s/ch serial-link transceiver with mixed-mode adaptive equalizer in 0.18um CMOS
| DC Field | Value | Language |
|---|---|---|
| dc.contributor.author | Yang J. | - |
| dc.contributor.author | Kim J. | - |
| dc.contributor.author | Byun S. | - |
| dc.contributor.author | Conroy C. | - |
| dc.contributor.author | Kim B. | - |
| dc.date.accessioned | 2013-03-17T23:36:30Z | - |
| dc.date.available | 2013-03-17T23:36:30Z | - |
| dc.date.created | 2012-02-06 | - |
| dc.date.issued | 2003-02-15 | - |
| dc.identifier.citation | Digest of Technical Papers - 2004 IEEE International Solid-State Circuits Conference, v.47, no., pp.176 - | - |
| dc.identifier.issn | 0193-6530 | - |
| dc.identifier.uri | http://hdl.handle.net/10203/142885 | - |
| dc.language | ENG | - |
| dc.title | A quad-channel 3.125Gb/s/ch serial-link transceiver with mixed-mode adaptive equalizer in 0.18um CMOS | - |
| dc.type | Conference | - |
| dc.identifier.scopusid | 2-s2.0-2442646318 | - |
| dc.type.rims | CONF | - |
| dc.citation.volume | 47 | - |
| dc.citation.beginningpage | 176 | - |
| dc.citation.publicationname | Digest of Technical Papers - 2004 IEEE International Solid-State Circuits Conference | - |
| dc.identifier.conferencecountry | United States | - |
| dc.identifier.conferencecountry | United States | - |
| dc.contributor.localauthor | Kim B. | - |
| dc.contributor.nonIdAuthor | Yang J. | - |
| dc.contributor.nonIdAuthor | Kim J. | - |
| dc.contributor.nonIdAuthor | Byun S. | - |
| dc.contributor.nonIdAuthor | Conroy C. | - |
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